Introduction to Virtex-4, ISE, and EDK
Virtex-4 FPGAs
Summary of Virtex-4 FX Features
ML410 Embedded Development Platform
UG085 (v1.7.2) December 11, 2008
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Virtex®-4 domain-optimized FPGAs provide an ideal mix of features and the greatest
choice of devices of any FPGA product line on the market today, with a column-based
architecture unique to the programmable logic industry. Virtex-4 FPGAs contain three
platforms: LX, FX, and SX. Choice and feature combinations are offered for all complex
applications. A wide array of hard-IP core blocks complete the system solution. These
cores include the PowerPC® processors (with a new APU interface), Tri-Mode Ethernet
MACs, 622 Mb/s to 6.5 Gb/s serial transceivers, dedicated DSP slices, high-speed clock
management circuitry, and source-synchronous interface blocks. The basic Virtex-4
building blocks allow migration of existing Virtex series designs. Virtex-4 devices are
produced by a state-of-the-art 90 nm copper process, using 300 mm (12 inch) wafer
technology. Combining a wide variety of flexible features, the Virtex-4 family enhances
programmable logic design capabilities and is a powerful alternative to ASIC technology.
The Virtex-4 family has an impressive collection of both programmable logic and hard IP,
historically the domain of ASICs. The Virtex-4 FX FPGAs used on ML410 platforms are
high-performance, full-featured solutions for embedded platform applications.
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Xesium™ clock technology
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Digital clock manager (DCM) blocks
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Additional phase-matched clock dividers (PMCD)
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Differential global clocks
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XtremeDSP™ slice
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18 x 18, two's complement, signed multiplier
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Optional pipeline stages
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Built-in accumulator (48-bits) and adder/subtracter
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Smart RAM memory hierarchy
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Distributed RAM
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Dual-port 18 Kb RAM blocks
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Optional pipeline stages
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Optional programmable FIFO logic - Automatically remaps RAM signals as
FIFO signals
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High-speed memory interface support: DDR and DDR2
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SDRAM, QDR II, RLDRAM II, and FCRAM II SelectIO technology
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1.5V to 3.3V I/O operation
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Chapter 1
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