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Chapter 2: ML410 Embedded Development Platform
52
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Table 2-19: CPU Trace/Debug Connection to FPGA (Cont'd)
Pin Name
ATCB_CLK
TRC_CLK
CPU_HALT_N
-
-
-
CPU_TDO
TRC_VSENSE
-
-
CPU_TCK
-
CPU_TMS
ATD_18
CPU_TDI
ATD_17
CPU_TRST_N
ATD_16
ATD_15
TRC_TS1O
ATD_14
TRC_TS2O
ATD_13
TRC_TS1E
ATD_12
TRC_TS2E
ATD_11
TRC_TS3
ATD_10
TRC_TS4
ATD_9
TRC_TS5
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FPGA Pin (U37)
AL8
AK8
AH17
NC
NC
NC
AM8
-
NC
NC
AJ27
NC
AM7
AH13
AK29
AJ11
AH27
AK7
AK21
AH7
AH24
AG10
AK11
AH8
AL21
AG11
AJ24
AF11
AJ29
AF10
AG13
AD12
ML410 Embedded Development Platform
UG085 (v1.7.2) December 11, 2008
R
Connector Pin (P8)
5
6
7
8
9
10
11
12
13
14
15
16
17
18
19
20
21
22
23
24
25
26
27
28
29
30
31
32
33
34
35
36
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