Detailed Description - Xilinx ML410 User Manual

Embedded development platform
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Chapter 2: ML410 Embedded Development Platform

Detailed Description

System ACE Status and Error LEDs
System ACE Configuration DIP Switch, SW3
Front Panel Header, J23
CPU JTAG Header, J12
LCD Interface
Header, J13
IDE Drive
Connectors,
J15/J16
System ACE CF
Controller, U38
CompactFlash
Slot, J22
MGT Differential
Clock Connectors, J17
FPGA JTAG/TRACE
Debug Connector, P8
Serial ATA
Host Connectors
PM1 Expansion Slot
ALi South Bridge
Super I/O
Controller, U15
Virtex-4
XC4VFX60
FPGA, U37
2.5V System OSC
and Socket
PM2 Expansion Slot
MGT CLK Source
Select, SW6
ATX Power
Connector, J18
24
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The ML410, shown in
Figure
guide.
Prog Pushbutton, SW4
Power-On
Switch
DDR Memory
MGT Differential
Clock, J20/J21
Figure 2-2: ML410 Board and Front Panel Detail
2-2, is an example of the ML410 series described in this user
ALi GPIO
Header, J5
Parallel Cable IV
(PC4) JTAG, J9
Reset Switches,
SW1/SW2
5.0V PCI
3.3V PCI
5.0V PCI
3.3V PCI
3.3V OSC
Socket
DDR2 DIMM
Memory
Power Supply Monitors,
LEDs, and Test Points
www.xilinx.com
ML410 Embedded Development Platform
PCI-to-PCI Bridge, U32
PCI Slots
(3.3V and 5.5V)
PCI Express Slots
Line Out, J2
Line In, J2
CDROM In, J6
Mic In and
Amp Out, J1
USB A/B, J3
Ethernet
Ports x 2,
P7
Parallel and
Serial Ports,
P1
PS/2 Mouse, Keyboard,
and VGA, P2
UG085_01_113005
UG085 (v1.7.2) December 11, 2008
R

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