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Table 2-25: 3.3V Primary PCI Bus Information
Device Name
PCI Slot 5
PCI Slot 3
U15, ALi SB
U15, ALi Pwr Mgt
U15, ALi IDE
U15, ALi Audio
U15, ALi Modem
U15, ALi USB#1
U15, ALi USB#2
U32, PCI-PCI Brg
U37, FPGA
Notes:
The PCI ALi South Bridge device uses a separate interrupt line that connects to the FPGA via schematic net SBR_INTR. Anytime an
interrupt occurs within the ALi South Bridge, it generates an interrupt on schematic net SBR_INTR.
Table 2-26: 5V Secondary PCI Bus Information
Device Name
PCI Slot 6
PCI Slot 4
U32, PCI-PCI Brg
ML410 Embedded Development Platform
UG085 (v1.7.2) December 11, 2008
Downloaded from
Elcodis.com
electronic components distributor
Table 2-25
shows how the primary PCI bus interrupts are connected on ML410 platforms
along with information for each device.
Dev. ID
Vend. ID Bus DEV IDSEL REQ
N/A
N/A
0
N/A
N/A
0
0x1533
0x10B9
0
0x7101
0x10B9
0
0x5229
0x10B9
0
0x5451
0x10B9
0
0x5457
0x10B9
0
0x5237
0x10B9
0
0x5237
0x10B9
0
0xAC23
0x104C
0
0x0410
0x10EE
0
Table 2-26
shows how the secondary PCI bus interrupts are connected on ML410 platforms
along with information for each device.
Dev. ID Vend. ID
Bus
N/A
N/A
1
N/A
N/A
1
N/A
N/A
N/A
FPGA
PCI CLK
5
AD21
0
0
6
AD22
1
1
2
AD18
3
3
12
AD28
3
3
11
AD27
3
3
1
AD17
3
3
3
AD19
3
3
15
AD31
3
3
10
AD26
3
3
9
AD25
4
4
8
AD24
Int.
5
Bridge
DEV
IDSEL
REQ
2
AD18
0
3
AD19
1
7
N/A
Int.
www.xilinx.com
Detailed Description
PCI Interrupts on FPGA
A
B
C
D
D
A
B
C
C
D
A
B
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
-
PCI Interrupts on FPGA
CLK
A
B
C
D
0
B
C
D
A
1
A
B
C
D
4
-
-
-
-
ALI SBR
-
-
(INT, NMI)
(INT, NMI)
(INT, NMI)
(INT, NMI)
(INT, NMI)
(INT, NMI)
(INT, NMI)
-
-
ALI SBR
-
-
-
61
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