Xilinx ML410 User Manual page 59

Embedded development platform
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ML410 Embedded Development Platform
UG085 (v1.7.2) December 11, 2008
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Table 2-24
shows the connections for the PCI controller.
Table 2-24: PCI Controller Connections
UCF Signal Name
PCI_CLK0
PCI_CLK1
PCI_CLK3
PCI_CLK4
PCI_CLK5
PCI_CLK5_FB
PCI_INTA_N
PCI_INTB_N
PCI_INTC_N
PCI_INTD_N
PCI_REQ0_N
PCI_REQ1_N
PCI_REQ2_N
PCI_REQ3_N
PCI_REQ4_N
PCI_GNT0_N
PCI_GNT1_N
PCI_GNT2_N
PCI_GNT3_N
PCI_GNT4_N
PCI_CBE[0]
PCI_CBE[1]
PCI_CBE[2]
PCI_CBE[3]
PCI_FRAME_N
PCI_IRDY_N
PCI_TRDY_N
PCI_STOP_N
PCI_DEVSEL_N
PCI_PERR_N
PCI_SERR_N
PCI_LOCK
PCI_IDSEL
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FPGA Pin (U37)
V5
PCI_P_CLK0
T11
PCI_P_CLK1
U7
PCI_P_CLK3
U3
PCI_P_CLK4
U5
PCI_P_CLK5
H17
PCI_P_CLK5
P5
PCI Interrupt Signals
R8
P9
V4
T3
PCI Request Signals
R7
T8
T9
R9
T4
PCI Grant Signals
T5
U8
V3
T6
M5
PCI Byte-Enable Signals
L6
R4
R6
N8
PCI Control Signals
N5
M3
P11
R3
M6
M7
P4
N7
Detailed Description
Description
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