Xilinx ML410 User Manual page 71

Embedded development platform
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ML410 Embedded Development Platform
UG085 (v1.7.2) December 11, 2008
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FPGA (U37)
IIC Bus
ALi South Bridge
(U15)
PCI Bus
M1535 D+
Figure 2-19: IIC and SMBus Block Diagram
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Detailed Description
U27
SMBus
Accelerator
LTC1694
U20
Temperature
Voltage
Temp
VCC12V_P
Monitor
VCC5V
ADDR:
VCC2V5
0x5C
VVCC3_PCI
LM87
VCC1V2
U22
Real Time Clock
ADDR:
0xA2
RTC8566
U21
EEPROM
Write Protect (Jumper Off)
ADDR:
0xA0
Note: Located on
24LC64
DDR2 DIMM P48
P48
SPD
EEPROM
ADDR:
0xA8
J23
Front
Panel
Header
U55
MIC2592B
PCIe Pwr Ctlr
ADDR:
0x8E
UG085_18_033007
71

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