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If the timer is disabled (TE=0) when the user program writes a new value inside the pre-
load register, this new value transfers immediately into the count register unless a direct
write to the TCTR has already been performed.
The preload register is initialized to zero by hardware RESET and software reset (RESET
instruction).
15 14 13 12 11 10
TE INV TO2 TO1 TO0 CIE OIE ES DC DC DC DC DC DC DC DC
15
15
15
7.5
TIMER COMPARE REGISTER (TCPR)
The output compare register is a 16-bit read/write register which is used to program an
action to occur at a specific time when the value of the count register reaches the value
contained in the compare register. The value in the compare register is compared against
the value of the count register on every instruction cycle. At the next event after the com-
pare matches, an interrupt is generated if enabled (CIE=1) and the state of the TOUT pin
changes according to the mode selected by the Timer Out Enable bits (TO2-TO0) of the
timer control register. This is useful for providing a pulse width modulated timer output.
The compare register is initialized to zero by hardware RESET and software reset
(RESET instruction).
MOTOROLA
TIMER COMPARE REGISTER (TCPR)
9
8
7
6
5
7
6
5
COUNT REGISTER
PRELOAD REGISTER
COMPARE REGISTER
Figure 7-2 Timer Programming Model
16-BIT TIMER AND EVENT COUNTER
4
3
2
1
0
4
3
2
1
0
0
0
0
READ/WRITE
TIMER CONTROL
REGISTER (TCR);
ADDRESS X:$FFEC
READ/WRITE
TIMER COUNT
REGISTER (TCTR);
ADDRESS X:$FFED
READ/WRITE
TIMER PRELOAD
REGISTER (TPR);
ADDRESS X:$FFEF
READ/WRITE
TIMER COMPARE
REGISTER (TCPR);
ADDRESS X:$FFEE
7 - 5
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