Host Receive Data Register (Hrx) - Motorola DSP56156 Manual

the host processor or DMA controller that the Transmit Byte Registers are empty. These
registers may be written in any order to transfer 8 or 16-bit data. However, writing the
Transmit Low register TXL clears the TXDE bit. Because writing the TXL register clears
the TXDE status bit, TXL is normally the last register written during a 16-bit data transfer.
The Transmit Byte Registers TXH:TXL are transferred as 16-bit data to the Host Receive
Data Register HRX when both TXDE bit and the Host Receive Data Full, HRDF, bit are
cleared. This transfer operation sets TXDE and HRDF.
7 6 5
* * *
7 6 5
DMA * *
15
HIGH BYTE
15
HIGH BYTE
ADDR(HEX)
X:$FFC4
X:$FFE4
X:$FFE5
Figure 5-2 Host Interface - DSP Programming Model
5.6

HOST RECEIVE DATA REGISTER (HRX)

The Host Receive Data register (HRX) is used for host processor to DSP data transfers.
The HRX register is viewed as a 16-bit read-only register by the DSP. The HRX register
is loaded with 16-bit data from the Transmit Data Registers TXH: TXL when both the
5 - 6

HOST RECEIVE DATA REGISTER (HRX)

4 3 2
HF3 HF2 HCIE HTIE
4 3 2
HF1 HF0 HCP HTDE HRDF
8 7
LOW BYTE
8 7
LOW BYTE
DSP READ DSP WRITE
HCR(8 BIT) HCR (8 BIT)
HSR (8 BIT) READ ONLY
HRX (16 BIT) HTX (16 BIT)
HOST INTERFACE
1 0 READ/WRITE
HOST CONTROL
HRIE REGISTER (HCR);
ADDRESS X:$FFC4
READ-ONLY
1 0
HOST STATUS
REGISTER (HSR);
ADDRESS X:$FFE4
READ-ONLY HOST
0
RECEIVE DATA
REGISTER (HRX);
ADDRESS X:$FFE5
0 WRITE-ONLY HOST
TRANSMIT DATA
REGISTER (HTX);
ADDRESS X:$FFE5
HOST INTERFACE
ADDRESS MAP
DSP
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