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SSIx CONTROL and STATUS REGISTERS
15
14
13
PSR
WL1
WL0
7
6
5
PM7
PM6
PM5
15
14
13
RIE
TIE
RE
7
6
5
SHFD SCKP SCKD FSD1
7
6
5
RDF
TDE
ROE
15
Dummy Register, No Content Is Actually Written
SSIx SLOT MASK REGISTERS
15 14 13 12 11 10
RS RS RS RS RS RS RS RS RS RS RS RS RS RS RS RS
31
30
29
28
27
15 14 13 12 11 10
RS RS RS RS RS RS RS RS RS RS RS RS RS RS RS RS
15
14
13
12
11
15 14 13 12 11 10
TS TS TS TS TS TS TS TS TS TS TS TS TS TS TS TS
31
30
29
28
27
15 14 13 12 11 10
TS TS TS TS TS TS TS TS TS TS TS TS TS TS TS TS
15
14
13
12
11
Figure 8-8 SSIx Programming Model (Continued)
MOTOROLA
SYNCHRONOUS SERIAL INTERFACE (SSI0 and SSI1)
SSI TRANSMIT SHIFT REGISTER
12
11
10
DC4
DC3
DC2
4
3
2
PM4
PM3
PM2
12
11
10
TE
MOD
SYN
4
3
2
A/MU
FSD0
4
3
2
TUE
RFS
TFS
8 7
9
8
7
6
5
26
25
24
23
22
21
20
9
8
7
6
5
10
9
8
7
6
5
9
8
7
6
5
26
25
24
23
22
21
20
9
8
7
6
5
10
9
8
7
6
5
9
8
DC1
DC0
1
0
SSI0 ADDRESS $FFD0
SSI1 ADDRESS $FFD8
PM1
PM0
9
8
FSI
FSL
1
0
SSI0 ADDRESS $FFD1
SSI1 ADDRESS $FFD9
OF1
OF0
1
0
IF1
IF0
SSI0 ADDRESS $FFF0
SSI1 ADDRESS $FFF8
0
RSMBx
4
3
2
1
0
SSI0: $FFF3
SSI1: $FFFB
19
18
17
16
RSMAx
4
3
2
1
0
SSI0: $FFF2
SSI1: $FFFA
4
3
2
1
0
TSMBx
4
3
2
1
0
SSI0: $FFF5
SSI1: $FFFD
19
18
17
16
TSMAx
4
3
2
1
0
SSI0: $FFF4
SSI1: $FFFC
4
3
2
1
0
READ-WRITE
SSIx CONTROL
REGISTER A (CRA)
READ-WRITE
SSIx CONTROL
REGISTER B (CRB)
READ-ONLY
SSIx STATUS
REGISTER (SR)
WRITE-ONLY
SSIx TIME SLOT
REGISTER (TSR)
SSI0 ADDRESS $FFF0
SSI1 ADDRESS $FFF8
READ-WRITE
SSIx RECEIVE
SLOT MASK
REGISTERS
READ-WRITE
SSIx TRANSMIT
SLOT MASK
REGISTERS
8 - 11
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