Application Examples; Example 1 - Motorola DSP56156 Manual

6.6

APPLICATION EXAMPLES

Examples one through four demonstrate applications in which different Codec decima-
tion/interpolation ratios are used with different clocking configurations. The fifth and last
example is a real-time I/O example using the on-chip codec and PLL. This example in-
cludes the DSP initialization as well as the filter code and is intended to be a framework
for user applications.
6.6.1

Example 1

This example illustrates an application where the input clock provided on the EXTAL pin
is 13 MHz and where the final sampling rate of the data converted is expected to be 8 KHz.
The different clock synthesis and decimation/interpolation ratios for the Σ∆ A/D and D/A
sections are shown in Figure 6-15.
13MHz
EXTAL
Codec Block
2nd order
Σ∆ modulator
1 bit
D/A
Figure 6-15 Example 1 functional block diagram
6 - 30
APPLICATION EXAMPLES
÷1,...,÷16
x 1,..., x16
÷
6.5
2MHz
2MHz
2MHz
2nd order
digital
Σ∆ modulator
÷
500KHz
3 pole
2 zero
LPF
5dB
DSP56156 ON-CHIP SIGMA/DELTA CODEC
x 4
PLL Block
16KHz
÷
125
125:1
3rd order
Comb Filter
16KHz
1:125
2nd order
Comb Filter
4
2MHz
4:1
3rd order
Comb Filter
DSP Core
Fosc
2:1
decimation
8 KHz
and
16-bit
compensation
sample
filter
1:2
interpolation
8 KHz
and
16-bit
compensation
sample
filter
MOTOROLA