Logical Instructions - Motorola DSP56156 Manual

MPY(su,uu) Mixed Mode Multiply*
MAC(su,uu) Mixed Mode Multiply-Accumulate*
NEG Negate
NEGC Negate with Borrow*
NORM Normalize*
RND Round
SBC Subtract Long with Carry
SUB Subtract †
SUBL Shift Left and Subtract
SWAP Swap MSP and LSP of an Accumulator*
Tcc Transfer Conditionally*
TFR Transfer Data ALU Register (Accumulator as destination) †
TFR2 Transfer Accumulator (32-bit Data Alu register as destination)*
TST Test an accumulator
TST2 Test an ALU data register*
ZERO Zero Extend Accumulator from bit 31*
*These instructions do not allow parallel data moves.
† These instructions allow a dual read parallel move.
1.7.1.2

Logical Instructions

The logical instructions perform all of the logical operations within the Data ALU. They
may affect all of the condition code register bits. Logical instructions are register-based as
are the arithmetic instructions above. Optional data transfers may be specified with most
logical instructions. With the exceptions of ANDI or ORI instructions, the destination of all
logical instructions is A1 or B1. These instructions execute in one instruction cycle. The
following are the logical instructions.
AND Logical AND
ANDI AND Immediate Program Controller Register*
EOR Logical Exclusive OR
LSL Logical Shift Left
LSR Logical Shift Right
NOT Logical Complement
OR Logical Inclusive OR
ORI OR Immediate Program Controller Register*
ROL Rotate Left
ROR Rotate Right
*These instructions do not allow parallel data moves.
MOTOROLA
INSTRUCTION SET SUMMARY
DSP56156 OVERVIEW 1 - 31