Table of Contents
Advertisement
MachXO5T-NX-Development Board
Evaluation Board User Guide
Appendix C. User Defined Preference File
// These names follow the MachXO5T-NX Development Board schematic but,
// they may be defined by the user.
Thus, they can be copied into the
// preference file and edited to match a different naming convention if
// needed or used to fill in the Spreadsheet view.
// LFMXO5-100T LED Connections
// Note: The following order matches the LED locations on the board
// from top D1 to bottom D8
ldc_set_location -site {G11} [get_ports {LED[0]}]
ldc_set_location -site {G15} [get_ports {LED[1]}]
ldc_set_location -site {G12} [get_ports {LED[2]}]
ldc_set_location -site {H12} [get_ports {LED[3]}]
ldc_set_location -site {L14} [get_ports {LED[4]}]
ldc_set_location -site {L15} [get_ports {LED[5]}]
ldc_set_location -site {M20} [get_ports {LED[6]}]
ldc_set_location -site {M19} [get_ports {LED[7]}]
//DIP Switch Connections
ldc_set_location -site {V2} [get_ports {DIPSW[0]}]
ldc_set_location -site {V3} [get_ports {DIPSW[1]}]
ldc_set_location -site {W2} [get_ports {DIPSW[2]}]
ldc_set_location -site {W3} [get_ports {DIPSW[3]}]
ldc_set_location -site {U4} [get_ports {DIPSW[4]}]
ldc_set_location -site {V4} [get_ports {DIPSW[5]}]
ldc_set_location -site {T4} [get_ports {DIPSW[6]}]
ldc_set_location -site {V5} [get_ports {DIPSW[7]}]
//Push Button Connections
ldc_set_location -site {K6} [get_ports PB1]
//add JP4 to enable PB2 control
ldc_set_location -site {B7}
[get_ports PB3]
//ldc_set_sysconfig {PROGRAMN_PORT=DISABLE}
//ldc_set_location -site {G10} [get_ports PB4]
//Clock inputs
ldc_set_location -site {C2} [get_ports clk_x4]
ldc_set_port -iobuf {IO_TYPE=LVCMOS33} [get_ports clk_x4]
ldc_set_location -site {U19} [get_ports clk_x8]
ldc_set_port -iobuf {IO_TYPE= LVSTLD_I} [get_ports clk_x8]
ldc_set_location -site {R3} [get_ports clk_x9]
ldc_set_port -iobuf {IO_TYPE=LVDS} [get_ports clk_x9]
//SLVS
ldc_set_location -site {W13} [get_ports {slvs_data[0]}]
ldc_set_location -site {V11} [get_ports {slvs_data[1]}]
ldc_set_location -site {Y12} [get_ports {slvs_data[2]}]
ldc_set_location -site {W9} [get_ports {slvs_data[3]}]
ldc_set_location -site {V12} [get_ports {slvs_data[4]}]
ldc_set_location -site {P13} [get_ports {slvs_data[5]}]
ldc_set_location -site {Y10} [get_ports {slvs_data[6]}]
© 2023 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02058-1.0
63
Advertisement
Table of Contents
