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Lattice Semiconductor MachXO2 Series Manuals
Manuals and User Guides for Lattice Semiconductor MachXO2 Series. We have
6
Lattice Semiconductor MachXO2 Series manuals available for free PDF download: Programming And Configuration Usage Manual, User Manual, Usage Manual, Quick Start
Lattice Semiconductor MachXO2 Series User Manual (32 pages)
LPDDR SDRAM Controller IP Core
Brand:
Lattice Semiconductor
| Category:
Controller
| Size: 2.88 MB
Table of Contents
Table of Contents
2
Chapter 1. Introduction
4
Introduction
4
Quick Facts
4
Features
4
Chapter 2. Functional Description
5
Overview
5
Initialization Block
5
I/O Training Block
6
Data Control Block
6
LPDDR I/Os
6
Command Application Logic Block
6
Command Decode Logic Block
6
Signal Descriptions
6
Using the Local User Interface
8
Initialization Control
8
Command and Address
8
User Commands
9
Power down and Deep Power down
11
User Commands for Wishbone Interface
11
Local-To-Memory Address Mapping
12
Mode Register Programming
13
Chapter 3. Parameter Settings
14
Mode Tab
14
Type Tab
15
Select Memory
15
Clock
16
Devices
16
Memory Data Bus Size
16
Data_Rdy to Write Data Delay
16
Clock Width
16
Setting Tab
16
Row Size
16
Column Size
16
I/O Auto Training
17
Periodic I/O Auto Retraining
17
Partial Array Self Refresh
17
Memory Clock
17
Burst Length
17
CAS Latency
17
Burst Type
17
Memory Device Timing Tab
18
Synthesis and Simulation Tab
18
Support Synplify
19
Support Modelsim
19
Support Aldec
19
Info Tab
19
Memory Interface Pins
19
Number of Bi-Directional Pins
19
Number of Output Pins
19
Getting Started
20
Chapter 4. IP Core Generation
20
Ipexpress-Created Files and Top Level Directory Structure
22
LPDDR SDRAM Controller IP Core File Structure
22
Top-Level Wrapper
23
Obfuscated Module for the Core
23
Obfuscated Module for the I/O Modules
23
Simulation Files for IP Core Evaluation
24
Test Bench Top
24
Obfuscated Core and I/O Simulation Models
24
Command Generator
24
Monitor
24
Memory Model
24
Memory Model Parameter
24
Evaluation Script File
25
Instantiating the Core
25
Running Functional Simulation
25
Synthesizing and Implementing the Core in a Top-Level Design
25
Hardware Evaluation
26
Enabling Hardware Evaluation
26
Updating/Regenerating the IP Core
26
Regenerating an IP Core
26
Chapter 5. Application Support
28
Core Implementation
28
Understanding Preferences
28
Chapter 6. Core Verification
29
Chapter 7. Support Resources
30
Lattice Technical Support
30
Online Forums
30
Telephone Support Hotline
30
E-Mail Support
30
Local Support
30
Internet
30
References
30
JEDEC Web Site
30
Revision History
31
Appendix A. Resource Utilization
32
Machxo2 Devices
32
Ordering Part Number
32
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Lattice Semiconductor MachXO2 Series User Manual (41 pages)
Brand:
Lattice Semiconductor
| Category:
Motherboard
| Size: 1.84 MB
Table of Contents
Table of Contents
3
Acronyms in this Document
5
Introduction
6
Features
7
Figure 2.1. Machxo3 Board (Machxo3L Version), Top Side
7
Figure 2.2. Machxo3 Board (Machxo3L Version), Bottom Side
8
Storage Handling
9
Software Requirements
10
Machxo2 and Machxo3 Devices
11
Demonstration Design
12
Overview
12
Figure 7.1. Machxo2 and Machxo3L/Lf-6900C Block Diagram
12
Run the Demonstration Design
13
Figure 6.1. Demonstration Design Block Diagram
13
Table 7.1. Starter Kit Components and Interfaces
13
Table 6.1. DIP Switch and LED Behavior
14
Download Demo Designs
15
Programming a Demo Design with the Lattice Diamond Programmer
15
Machxo2 and Machxo3 Starter Kits
17
Subsystems
17
Clock Sources
17
Expansion Header Landings
17
Table 7.2. Expansion Connector Reference
17
Table 7.3. Expansion Header Pin Information (J3)
18
Table 7.4. Expansion Header Pin Information (J4)
19
Table 7.5. Expansion Header Pin Information (J6)
20
Table 7.6. Expansion Header Pin Information (J8)
21
Figure 7.2. J3/J4 Header Landing Callout
22
Figure 7.3. J6/J8 Header Landing Callout
22
Machxo2/Machxo3 FPGA
23
Programming Interface Circuits
23
Figure 7.4. J1 Header Landing and LED Array Callout
23
Table 7.7. Machxo2 and Machxo3 FPGA Interface Reference
23
Table 7.8. USB/JTAG Interface Reference
23
Leds
24
Power Supply
24
Test Points
24
USB Programming and Debug Interface
24
Table 7.9. JTAG Programming Pin Information
24
Table 7.10. SPI Programming Pin Information
24
Table 7.11. I 2 C Programming Pin Information
24
Table 7.12. Power and User Leds Reference
24
Board Modifications
25
Bypassing the USB Programming Interface
25
Applying External Power
25
Measuring Bank and Core Power
25
Mechanical Specifications
25
Environmental Requirements
25
Table 7.13. USB Interface Reference
25
Troubleshooting
26
Leds Do Not Flash
26
USB Cable Not Detected
26
Accessing the Troubleshooting the USB Driver Installation Guide
26
Restoring Original Demo Design
26
Ordering Information
27
Table 9.1. Ordering Information
27
Technical Support Assistance
28
Appendix A. Schematic Diagrams
29
Figure A.1. Block Diagram
29
Figure A.2. USB Interface to JTAG
30
Figure A.3. FPGA
31
Figure A.4. FPGA
32
Figure A.5. Power Leds
33
Figure A.6. Bank 2 I/O
34
Figure A.7. Bank 3, 4, 5 I/O
35
Figure A.8. Power Decoupling and Leds
36
Appendix B. Bill of Materials
37
Revision History
39
Lattice Semiconductor MachXO2 Series Programming And Configuration Usage Manual (58 pages)
Brand:
Lattice Semiconductor
| Category:
Controller
| Size: 4.41 MB
Table of Contents
Definition of Terms
2
Configuration Details
2
Configuration Process and Flow
3
Power-Up Sequence
4
User Mode
6
Clearing the Configuration Memory and Re-Initialization
6
Memory Space Accessibility
6
On-Chip Flash Programming
7
Bitstream/Prom Sizes
7
Feature Row
9
Sysconfig™ Ports
11
Sysconfig Pins
11
Configuration Modes
19
SDM Mode
19
Master SPI Configuration Mode (MSPI)
20
Dual Boot Configuration Mode
23
Slave SPI Mode (SSPI)
24
I 2 C Configuration Mode
26
WISHBONE Configuration Mode
27
JTAG Mode
28
Transfr Operation
29
Software Selectable Options
30
Bitstream Generation Options
34
Security Options
36
Device Wake-Up Sequence
37
Wake-Up Signals
37
Wake-Up Clock Selection
38
Machxo2 JEDEC File Format
40
Machxo2 Flash Memory Programming Flow
43
Machxo2 Programming Commands
51
Reading Flash Pages
53
Technical Support Assistance
54
Revision History
54
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Lattice Semiconductor MachXO2 Series User Manual (25 pages)
Breakout Board Evaluation Kit
Brand:
Lattice Semiconductor
| Category:
Motherboard
| Size: 2.09 MB
Table of Contents
Storage and Handling
3
Software Requirements
3
Machxo2 Device
3
Demonstration Design
4
Run the Demonstration Design
4
Download Demo Designs
5
Programming a Demo Design with the Lattice Diamond Programmer
5
Machxo2 Breakout Board
6
Troubleshooting
15
Mechanical Specifications
15
Environmental Requirements
15
Ordering Information
16
Technical Support Assistance
16
Revision History
17
Appendix A. Schematics
18
Appendix B. Bill of Materials
23
Lattice Semiconductor MachXO2 Series Usage Manual (11 pages)
Brand:
Lattice Semiconductor
| Category:
Controller
| Size: 0.78 MB
Table of Contents
SED Limitations
2
SED Operating Modes
2
Standard SED
3
One-Shot SED
3
Signal Descriptions
4
SED Clock Driver
4
SED Attributes
4
Timing Diagram for SED Operation
7
SED Run Time
7
Sample Code
8
SED Verilog Examples
9
Technical Support Assistance
9
Revision History
10
Lattice Semiconductor MachXO2 Series Quick Start (5 pages)
Dual Sensor Interface Board
Brand:
Lattice Semiconductor
| Category:
Computer Hardware
| Size: 1.73 MB
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