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MachXO5T-NX-Development Board
Evaluation Board User Guide
13. LEDs and Switches
LEDs and switches of the MachXO5T-NX Development Board that can be used in demo and customer designs are
described in this section.
13.1. 8-Position DIP Switch
Four LFMXO5-100T pins are connected to the four switches of SW1, as shown in the circuit design in
DIP switches are connected to logic level 0 when in the ON position, as shown in
One side of each switch is connected to GPIOs within the VCCIO5 bank and pulled up through 4.7 kΩ resistors. The
other side is grounded. The designated pins are connected, as shown in
Table 13.1. Four-Position DIP Switch Signals
Net Name
DIP1
DIP2
DIP3
DIP4
DIP5
DIP6
DIP7
DIP8
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Figure 13.1. Eight-Position DIP Switch Circuits
Figure 13.2. Eight-position DIP Switch
LFMXO5-100T Ball
SW1 DIP Switch
Location
V2
V3
W2
W3
U4
V4
T4
V5
Figure
Table
13.1.
4.7 kΩ Pull up Resistor
Position
1
R39
2
R40
3
R41
4
R42
5
R55
6
R56
7
R57
8
R58
Figure
13.1. The
13.2.
Logic Input Level at
ON Position
0
0
0
0
0
0
0
0
FPGA-EB-02058-1.0
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