Soft Jtag/Uart User Interface; Soft Jtag User Interface; Figure 4.1. Jtag/Uart User Interfacing; Table 4.1. Soft Jtag Connections - Lattice Semiconductor MachXO5T-NX-Development Board User Manual

MachXO5T-NX-Development Board
Evaluation Board User Guide

4. Soft JTAG/UART User Interface

The soft JTAG/UART user interface for the MachXO5T-NX Development Board is shown in
uses an FT2232H FTDI part U18 to convert USB to user JTAG from port A, or convert USB to UART from port B. Using
Detect Cable function with Radiant programming software installed and ensuring FTDI reset control jumper JP8 is not
populated in default, as shown in
connect the mini USB to USB-A cable from J19 to your PC. The software select option FTUSB-0 is targeted for user JTAG,
and FTUSB-1 is targeted for UART that is mapped with port A and port B from hardware perspective.
Mini-USB
USB
(J19)
JP8
GND

4.1. Soft JTAG User Interface

User FTDI Port A is connected with GPIOs in Bank 1 directly. You need allocate GPIOs for adaption with JTAG signals by
programmable logic, which is defined by FTDI Port A when converting USB to JTAG through FTUSB-0. J18 is an eight-pin
standalone JTAG header that is used with an external Lattice download cable (available separately) when the FTDI part
is disabled from the JTAG chain after setting JP8. J18 can also be used as test point when USB to JTAG is working.

Table 4.1. Soft JTAG Connections

J18 Pin Number
1
2
3
4
5
6
7
8
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16
Figure 3.2, you can detect other dual ports after power up the board. You can then
Port B
FT2232H
(U18)
Port A
rst#
User JTAG Header (J18)

Figure 4.1. JTAG/UART User Interfacing

FTDI Signal
—
UADBUS2
UADBUS1
—
—
UADBUS3
—
UADBUS0
Figure
RS232_RX_TTL
RS232_TX_TTL
UTMS
UTDO
UTDI
UTCK
JTAG Net Name LFMXO5-100T Ball Location
VCCIO1
UTDO
UTDI
—
—
UTMS
GND
UTCK
4.1. Supposedly it also
LFMXO5-100T
(U3)
—
F12
F13
—
—
G13
—
G14
FPGA-EB-02058-1.0