Figure A. 5. Pmod0/Versa Connector (Bank1/2) - Lattice Semiconductor MachXO5T-NX-Development Board User Manual

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MachXO5T-NX-Development Board
Evaluation Board User Guide
5
+2.5V
J8
1
D
EXPCON_2V5
R146
DNI
3
EXPCON_IO30
0
5
EXPCON_IO32
7
EXPCON_IO34
9
EXPCON_IO36
11
EXPCON_IO38
13
EXPCON_IO40
+5.0V
15
EXPCON_IO42
17
EXPCON_IO44
19
R30
DNI
5VIN
21
EXPCON_2V5
23
0
25
27
+3.3V
EXPCON_OSC
29
EXPCON_CLKIN
R31
31
EXPCON_CLKOUT
33
35
0
37
EXPCON_3V3
39
HDR40
C
[3] 12MHZ
EXPCON_IO13
0
EXPCON_IO15
0
VCCIO1
U3B
C18
VCCIO1
D17
VCCIO1
C56
C57
0.1uF
0.1uF
PR13B/PMU_WAKEUPN
B
VCCIO1
C45
10uF
OSC_IN
R144
0
EXT_CLK
A
J10
SMA
DNI
PR13A/TCK/SCLK/PMU_EXT_CLK
LFMXO5-100-BBG400
5
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
48
4
VERSA Connectors
Pin 2 removed for coding
of expansion board
J9
HPE_RESOUT#
2
1
2
EXPCON_IO29
EXPCON_IO0
EXPCON_IO1
4
3
4
EXPCON_IO31
EXPCON_IO2
EXPCON_IO3
6
5
6
EXPCON_IO33
EXPCON_IO4
EXPCON_IO5
8
7
8
EXPCON_IO35
EXPCON_IO6
EXPCON_IO7
10
9
10
EXPCON_IO37
EXPCON_IO8
EXPCON_IO9
12
11
12
EXPCON_IO39
EXPCON_IO10
EXPCON_IO11
14
13
14
EXPCON_IO41
EXPCON_IO12
EXPCON_IO13
16
15
16
EXPCON_IO43
EXPCON_IO14
EXPCON_IO15
18
17
18
EXPCON_IO45
EXPCON_3V3
20
19
20
EXPCON_IO16
22
21
22
EXPCON_IO17
24
23
24
EXPCON_IO18
26
25
26
EXPCON_IO19
EXPCON_IO20
28
27
28
EXPCON_IO21
30
29
30
EXPCON_IO22
EXPCON_IO23
32
31
32
EXPCON_IO24
34
33
34
EXPCON_IO25
EXPCON_IO26
36
35
36
EXPCON_IO27
38
37
38
CARDSEL#
EXPCON_IO28
40
39
40
HDR40
EXPCON_OSC
R159
DNI
0
SW4
SCL0
DNI
R35
SCL0 [3,9]
DNI
R37
SDA0
SDA0 [3,9]
PB3
EXPCON_IO8
B18
PR3B
OSC_IN
A17
Close JP4 to use SW4 reset ASC Brdige Board
PR4A/URC_GPLL0T_IN
EXPCON_IO7
A16
PR4B/URC_GPLL0C_IN
EXPCON_IO9
B17
PR6A
EXPCON_IO6
C17
PR8A
EXPCON_IO4
D16
PR10A
FTDI_SDA
A18
FTDI_SDA [3]
PR11A/SDA
FTDI_SCL
A19
FTDI_SCL [3]
PR11B/SCL
EXPCON_IO13
B20
EXPCON_IO2
F15
PR15A
EXPCON_IO5
F16
PR15B
EXPCON_IO10
F17
PR17A
EXPCON_IO11
E17
R33
PR17B
EXPCON_IO17
C19
2.2K
PR19A
EXPCON_IO20
D19
PR19B
EXPCON_IO18
C20
PR20A
EXPCON_IO19
FTDI_SCL
D20
PR20B
EXPCON_IO14
FTDI_SDA
F18
PR22A
EXPCON_IO12
E18
PR22B
EXPCON_IO22
F19
C15
PR24A
EXPCON_IO21
E19
PR24B
EXPCON_IO15
G16
150pF
PR26A
G15
XLED1
DNI
PR26B
EXPCON_IO16
G17
PR28A/PCLKT1_2
G18
CARDSEL#
PR28B
EXPCON_IO26
G19
PR29A/PCLKT1_1
EXPCON_IO25
G20
PR29B
EXPCON_IO24
F20
PR31A/PCLKT1_0
EXPCON_IO23
E20
VCCIO1
PR31B
HPE_RESOUT#
H14
PR33A
EXPCON_IO1
H13
PR33B
EXPCON_IO0
H15
PR35A
EXPCON_IO3
H16
R125
PR35B
EXPCON_IO28
H18
PR38A
EXPCON_IO27
H17
1K
PR38B
JP2
A14
JTAGEN
2
JTAG_EN
NX_TCK
B19
NX_TCK [3]
NX_TMS
B16
JTAG_DIS
NX_TMS [3]
PR6B/TMS/SCSN
NX_TDI
C16
NX_TDI [3]
PR8B/TDI/SSI
NX_TDO
E16
NX_TDO [3]
PR10B/TDO/SSO
4

Figure A. 5. PMOD0/Versa Connector (BANK1/2)

© 2023 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
3
+3.3V
R147
0
DNI
VCCIO1
R149
PMOD0_1
1
PMOD0_2
4.7k
JP4
2
EXPCON_IO20
SW4
2
1
PMOD0_3
3
ASC_RST
C99
PMOD0_4
4
100nF
5
6
VCCIO2
VCCIO1
U3C
K18
H20
VCCIO2
PR40A
H19
PR40B
C46
J20
PR42A/PCLKT2_0
J19
PR42B
J18
R34
0.1uF
PR44A/PCLKT2_1
J17
2.2K
PR44B
J16
PR46A/PCLKT2_2
J15
PR46B
J14
PR47A
J13
PR47B
J11
PR49A
VCCIO2
C16
J12
PR49B
K10
PR51A
150pF
J10
PR51B
DNI
K14
PR53A
K13
C55
PR53B
K12
PR55A
K11
10uF
PR55B
K16
PR56A
K15
PR56B
K19
PR58A
K20
PR58B
L20
PR60A
L19
PR60B
L18
PR62A
M18
PR62B
L17
PR64A
L16
PR64B
1
L15
PR65A
L14
PR65B
M20
PR67A
M19
PR67B
LFMXO5-100-BBG400
3
2
VCCIOS
R113
R114
R115
R116
1K
1K
1K
1K
D8
D7
D6
D5
Red
Red
Red
Red
XLED7
XLED6
XLED5
XLED4
XLED3
[4] XLED3
XLED2
[4] XLED2
XLED1
XLED0
[4] XLED0
J15
NOTE : PLACE SWITCH ON THE TOP SIDE
PMOD0_5
7
PMOD0_6
8
PMOD0_7
LEDs
9
PMOD0_8
10
VCCIO2
LEDs Signal Map
11
U3 ball Ref#
12
G11
D1
C122
PMOD 2x6
G15
D2
100nF
G12
D3
H12
D4
EXPCON_IO34
EXPCON_IO35
L14
D5
EXPCON_CLKOUT
EXPCON_IO37
D6
L15
EXPCON_CLKIN
EXPCON_IO32
M20
D7
EXPCON_OSC
EXPCON_IO41
M19
D8
EXPCON_IO38
EXPCON_IO39
EXPCON_IO30
EXPCON_IO33
EXPCON_IO31
EXPCON_IO29
EXPCON_IO42
EXPCON_IO45
EXPCON_IO44
EXPCON_IO36
EXPCON_IO40
EXPCON_IO43
PMOD0_5
PMOD0_1
PMOD0_7
PMOD0_4
PMOD0_3
PMOD0_8
PMOD0_6
L L L a a a t t t t t t i i i c c c e e e S S S e e e m m m i i i c c c o o o n n n d d d u u u c c c t t t o o o r r r A A A p p p p p p l l l i i i c c c a a a t t t i i i o o o n n n s s s
PMOD0_2
E E E m m m a a a i i i l l l : : : t t t e e e c c c h h h s s s u u u p p p p p p o o o r r r t t t @ @ @ L L L a a a t t t t t t i i i c c c e e e s s s e e e m m m i i i . . . c c c o o o m m m
XLED5
P P P h h h o o o n n n e e e ( ( ( 5 5 5 0 0 0 3 3 3 ) ) ) 2 2 2 6 6 6 8 8 8 - - - 8 8 8 0 0 0 0 0 0 1 1 1 - - - o o o r r r - - - ( ( ( 8 8 8 0 0 0 0 0 0 ) ) ) L L L A A A T T T T T T I I I C C C E E E
XLED4
XLED6
T T T i i i t t t l l l e e e
XLED7
P P P M M M O O O D D D 0 0 0 / / / V V V e e e r r r s s s a a a c c c o o o n n n n n n e e e c c c t t t o o o r r r ( ( ( B B B A A A N N N K K K 1 1 1 / / / 2 2 2 ) ) )
S S S i i i z z z e e e
P P P r r r o o o j j j e e e c c c t t t
B B B
M M M a a a c c c h h h X X X O O O 5 5 5 - - - N N N X X X 1 1 1 0 0 0 0 0 0 K K K D D D e e e v v v e e e l l l o o o p p p m m m e e e n n n t t t B B B o o o a a a r r r d d d
D D D a a a t t t e e e : : :
F F F r r r i i i d d d a a a y y y , , , F F F e e e b b b r r r u u u a a a r r r y y y 1 1 1 7 7 7 , , , 2 2 2 0 0 0 2 2 2 3 3 3
2
1
D
R117
R118
R119
R120
1K
1K
1K
1K
D4
D3
D2
D1
Red
Red
Red
Red
C
Signal
XLED0
XLED1
XLED2
XLED3
XLED4
B
XLED5
XLED6
XLED7
A
1 1 1 . . . 0 0 0
S S S c c c h h h e e e m m m a a a t t t i i i c c c R R R e e e v v v
B B B o o o a a a r r r d d d R R R e e e v v v
A A A
S S S h h h e e e e e e t t t
5 5 5
o o o f f f
1 1 1 1 1 1
1
FPGA-EB-02058-1.0

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