Soft Uart User Interface; Table 4.2. Soft Uart Connections - Lattice Semiconductor MachXO5T-NX-Development Board User Manual

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4.2. Soft UART User Interface

User FTDI Port B is also connected with GPIOs in Bank 0 directly. You need allocate GPIOs for adaption with UART
signals by programmable logic, which is defined by FTDI Port B when converting USB to UART through FTUSB-1.

Table 4.2. Soft UART Connections

FTDI Signal
UBDBUS0
UBDBUS1
UBDBUS2
UBDBUS3
UBDBUS4
UBDBUS5
UBDBUS6
UBDBUS7
© 2023 Lattice Semiconductor Corp. All Lattice trademarks, registered trademarks, patents, and disclaimers are as listed at www.latticesemi.com/legal.
All other brand or product names are trademarks or registered trademarks of their respective holders. The specifications and information herein are subject to change without notice.
FPGA-EB-02058-1.0
UART Net Name
RS232_RX_TTL
RS232_TX_TTL
RTSn
CTSn
DTRn
DSRn
DCDn
RI
MachXO5T-NX-Development Board
Evaluation Board User Guide
LFMXO5-100T Ball Location for Port A
C15
D15
B15
A15
E13
E12
D14
E15
17

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