Leds And Switches; Four-Position Dip Switch; Figure 7.1. Four-Position Dip Switch Circuits; Figure 7.2. Four-Position Dip Switch Photograph - Lattice Semiconductor MachXO3-940 User Manual

MachXO3-9400 Development Board
Evaluation Board User Guide

LEDs and Switches

This section describes the MachXO3-9400 Development Board LEDs and switches that can be used in demo and
customer designs.

7.1. Four-Position DIP Switch

Four MachXO3 pins are connected to the four switches of SW1, as shown in the circuit design in
side actuated DIP switches are connected to logic level 0 when in the ON position as shown in
One side of each switch is connected to GPIOs within the VCCIO5 bank and pulled up through 4.7 kΩ resistors. The
other side is grounded. The designated pins are connected as shown in

Table 7.1. Four-Position DIP Switch Signals

Signal Name
DIP_SW1
DIP_SW2
DIP_SW3
DIP_SW4
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26
VCCIO5
R39 R40 R41 R42
4.7K 4.7K 4.7K 4.7K
DIP_SW1
DIP_SW2
DIP_SW3
DIP_SW4

Figure 7.1. Four-Position DIP Switch Circuits

Figure 7.2. Four-Position DIP Switch Photograph

MachXO3 Ball SW1 DIP Switch
Location Position
H5
J5
J4
J3
SW1
1 8
1 8
2 7
2 7
3 6
3 6
4 5
4 5
SW-DIP4
Table 7.1.
4.7K Pull up Resistor
1 R39
2 R40
3 R41
4 R42
Figure 7.1. The CTS
Figure 7.2.
Logic Level at ON
Position
0
0
0
0
FPGA-EB-02004-1.0