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9. LEDs and Switches
LEDs and switches of the MachXO5-NX Development Board that can be used in demo and customer designs are
described in this section.
9.1. Four-Position DIP Switch
Four MachXO5-25 pins are connected to the four switches of SW1, as shown in the circuit design in
side actuated DIP switches are connected to logic level 0 when in the ON position, as shown in
One side of each switch is connected to GPIOs within the VCCIO5 bank and pulled up through 4.7 kΩ resistors. The
other side is grounded. The designated pins are connected, as shown in
Table 9.1. Four-Position DIP Switch Signals
Net Name
DIP_SW1
DIP_SW2
DIP_SW3
DIP_SW4
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FPGA-EB-02052-0.90
Figure 9.1. Four-Position DIP Switch Circuits
Figure 9.2. Four-position DIP Switch
MachXO5-25 Ball
SW1 DIP Switch
Location
T1
T2
T3
T4
Preliminary Evaluation Board User Guide
Table
9.1.
4.7 kΩ Pull up Resistor
Position
1
R39
2
R40
3
R41
4
R42
MachXO5-NX Development Board
Figure
9.1. The CTS
Figure
9.2.
Logic Level at ON
Position
0
0
0
0
33
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