Uart (Uart3); Overview - Epson S1C31W65 Technical Manual

13 UART (UART3)

13.1 Overview

The UART3 is an asynchronous serial interface. The features of the UART3 are listed below.
• Includes a baud rate generator for generating the transfer clock.
• Supports 7- and 8-bit data length (LSB first).
• Odd parity, even parity, or non-parity mode is selectable.
• The start bit length is fixed at 1 bit.
• The stop bit length is selectable from 1 bit and 2 bits.
• Supports full-duplex communications.
• Includes a 2-byte receive data buffer and a 1-byte transmit data buffer.
• Includes an RZI modulator/demodulator circuit to support IrDA 1.0-compatible infrared communications.
• Can detect parity error, framing error, and overrun error.
• Can generate receive buffer full (1 byte/2 bytes), transmit buffer empty, end of transmission, parity error, framing
error, and overrun error interrupts.
• Can issue a DMA transfer request when a receive buffer
• Input pin can be pulled up with an internal resistor.
• The output pin is configurable as an open-drain output.
• Provides the carrier modulation output function.
Figure 13.1.1 shows the UART3 configuration.
Item
Number of channels
Clock generator
CPU
DMA controller
S1C31W65 TECHNICAL MANUAL
(Rev. 1.1)
Table 13.1.1 UART3 Channel Configuration of S1C31W65
UART3 Ch.n
CLK_UART3_n
CLKSRC[1:0]
CLKDIV[1:0]
DBRUN
MODEN
Transmit/receive
control circuit
Receive data buffer
Shift register
RXD[7:0]
Transmit data buffer
Shift register
TXD[7:0]
TENDIE
FEIE
PEIE
control circuit
OEIE
RB2FIE
RB1FIE
TBEIE
DMA request
control circuit
Figure 13.1.1 UART3 Configuration
Seiko Epson Corporation
byte full or a transmit buffer empty occurs.
one
S1C31W65
2 channels (Ch.0 and Ch.1)
BRDIV
Baud rate
BRT[7:0]
generator
FMD[3:0]
CHLN
PREN
PRMD
STPB
RBSY
TBSY
SFTRST
PUEN
RZI demodulator
INVRX
IRMD
RZI modulator
INVTX
Carrier modulator
PECAR
CAREN
CRPER[7:0]
OUTMD
TENDIF
FEIF
Interrupt
PEIF
OEIF
RB2FIF
RB1FIF
TBEIF
TBEDMAENx
RB1FDMAENx
13 UART (UART3)
USINn
USOUTn
13-1