Uart (Uart3); Overview - Epson S1C17M20 Technical Manual

12 UART (UART3)

12.1 Overview

The UART3 is an asynchronous serial interface. The features of the UART3 are listed below.
• Includes a baud rate generator for generating the transfer clock.
• Supports 7- and 8-bit data length (LSB first).
• Odd parity, even parity, or non-parity mode is selectable.
• The start bit length is fixed at 1 bit.
• The stop bit length is selectable from 1 bit and 2 bits.
• Supports full-duplex communications.
• Includes a 2-byte receive data buffer and a 1-byte transmit data buffer.
• Includes an RZI modulator/demodulator circuit to support IrDA 1.0-compatible infrared communications.
• Can detect parity error, framing error, and overrun error.
• Can generate receive buffer full (1 byte/2 bytes), transmit buffer empty, end of transmission, parity error, framing
error, and overrun error interrupts.
• Input pin can be pulled up with an internal resistor.
• The output pin is configurable as an open-drain output.
• Provides the carrier modulation output function.
Figure 12.1.1 shows the UART3 configuration.
Table 12.1.1 UART3 Channel Configuration of S1C17M20/M21/M22/M23/M24/M25
Item
Number of channels
Clock generator
Interrupt
controller
S1C17M20/M21/M22/M23/M24/M25
TECHNICAL MANUAL (Rev. 1.0)
S1C17M20/M23
24-pin package
UART3 Ch.n
CLK_UART3_n
CLKSRC[1:0]
CLKDIV[1:0]
DBRUN
MODEN
Transmit/receive
Receive data buffer
RXD[7:0]
Transmit data buffer
TXD[7:0]
TENDIE
FEIE
PEIE
OEIE
RB2FIE
RB1FIE
TBEIE
Figure 12.1.1 UART3 Configuration
Seiko Epson Corporation
S1C17M21/M24
32-pin package
2 channels (Ch.0 and Ch.1)
BRDIV
Baud rate
BRT[7:0]
generator
FMD[3:0]
CHLN
PREN
PRMD
STPB
control circuit
RBSY
TBSY
SFTRST
PUEN
Shift register RZI demodulator
INVRX
IRMD
RZI modulator
Shift register INVTX
Carrier modulator
PECAR
CAREN
CRPER[7:0]
OUTMD
TENDIF
FEIF
Interrupt
PEIF
control circuit
OEIF
RB2FIF
RB1FIF
TBEIF
12 UART (UART3)
S1C17M22/M25
USINn
USOUTn
12-1