P2 Port Group - Epson S1C31W65 Technical Manual

7.7.3 P2 Port Group

The P2 port group supports the GPIO and interrupt functions.
Register name Bit
PPORTP2DAT 15–8 P2OUT[7:0]
(P2 Port Data
7–0 P2IN[7:0]
Register)
PPORTP2IOEN 15–8 P2IEN[7:0]
(P2 Port Enable
7–0 P2OEN[7:0]
Register)
PPORTP2RCTL 15–8 P2PDPU[7:0]
(P2 Port Pull-up/down
7–0 P2REN[7:0]
Control Register)
PPORTP2INTF 15–8 P2FIF[7:0]
(P2 Port Interrupt
7–0 P2RIF[7:0]
Flag Register)
PPORTP2INTCTL 15–8 P2FIE[7:0]
(P2 Port Interrupt
7–0 P2RIE[7:0]
Control Register)
PPORTP2CHATEN 15–8 –
(P2 Port Chattering
7–0 P2CHATEN[7:0]
Filter Enable Register)
PPORTP2MODSEL 15–8 –
(P2 Port Mode Select
7–0 P2SEL[7:0]
Register)
PPORTP2FNCSEL 15–14 P27MUX[1:0]
(P2 Port Function
13–12 P26MUX[1:0]
Select Register)
11–10 P25MUX[1:0]
9–8 P24MUX[1:0]
7–6 P23MUX[1:0]
5–4 P22MUX[1:0]
3–2 P21MUX[1:0]
1–0 P20MUX[1:0]
P2SELy = 0
Port
name
GPIO
Peripheral
P20 P20 SNDA
P21 P21 SNDA
P22 P22 REMC3
P23 P23 REMC3
P24 P24 T16 Ch.2
P25 P25 T16 Ch.0
P26 P26 T16 Ch.1
P27 P27 T16 Ch.2
*1: Refer to the "Universal Port Multiplexer" chapter.
S1C31W65 TECHNICAL MANUAL
(Rev. 1.1)
Table 7.7.3.1 Control Registers for P2 Port Group
Bit name Initial
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x00
0x0
0x0
0x0
0x0
0x0
0x0
0x0
0x0
Table 7.7.3.2 P2 Port Group Function Assignment
P2yMUX = 0x0 P2yMUX = 0x1
(Function 0) (Function 1)
Pin Peripheral
BZOUT UPMUX
#BZOUT UPMUX
REMO UPMUX
CLPLS UPMUX
EXCL20 UPMUX
EXCL01 UPMUX
EXCL11 UPMUX
EXCL21 UPMUX
Seiko Epson Corporation
Reset R/W
H0 R/W –
H0 R
H0 R/W –
H0 R/W
H0 R/W –
H0 R/W
H0 R/W Cleared by writing 1.
H0 R/W
H0 R/W –
H0 R/W
– R –
H0 R/W
– R –
H0 R/W
H0 R/W –
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
P2SELy = 1
P2yMUX = 0x2
(Function 2)
Pin Peripheral Pin
– –
*1
– –
*1
– –
*1
– –
*1
– –
*1
– –
*1
– –
*1
– –
*1
7 I/O PORTS (PPORT)
Remarks
P2yMUX = 0x3
(Function 3)
Peripheral Pin
– –
– –
– –
– –
– –
LCD8D SEG55
LCD8D SEG54
LCD8D SEG53
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