Epson S1C31W65 Technical Manual page 231

17 SOUND GENERATOR (SNDA)
Internal trigger signal
Sound buffer
(SNDADAT register)
Sound register
SNDAINTF.SBSY
SNDAINTF.EMIF
SNDAINTF.EDIF
BZOUT/#BZOUT pin
(Melody waveform output)
Melody output using DMA
By setting the SNDAEMDMAEN.EMDMAENx bit to 1 (DMA transfer request enabled), a DMA transfer re-
quest is sent to the DMA controller and melody data is transferred from the specified memory to the sound buf-
fer (SNDADAT register) via DMA Ch.x when the SNDAINTF.EMIF bit is set to 1 (sound buffer empty).
This automates the melody output procedure from Steps 2 to 4 described above.
The transfer source/destination and control data must be set for the DMA controller and the relevant DMA
channel must be enabled to start a DMA transfer in advance so that transmit data will be transferred to the
sound buffer (SNDADAT register). For more information on DMA, refer to the "DMA Controller" chapter.
Table 17.4.4.1 DMA Data Structure Configuration Example (for Melody Output)
End pointer Transfer source
Transfer destination SNDADAT register address
Control data dst_inc
dst_size
src_inc
src_size
R_power
n_minus_1
cycle_ctrl
Melody output waveform configuration
Note/rest (duration) specification
Notes and rests can be specified using the SNDADAT.MDRS and SNDADAT.SLEN[5:0] bits.
Table 17.4.4.2 Note/Rest Specification (when f
SNDADAT.SLEN[5:0] bits
0x0f
0x0b
0x07
0x05
0x03
0x01
0x00
Other
17-8
Writing to the SNDADAT register
Note 1 Note 2
Note 1
Note 1
Software operation
Figure 17.4.4.1 Melody Mode Operation Timing Chart
Item
Memory address in which the last melody data is stored
0x3 (no increment)
0x1 (halfword)
0x1 (+2)
0x1 (halfword)
0x0 (arbitrated for every transfer)
Number of transfer data
0x1 (basic transfer)
Dotted quarter note
Quarter note
Dotted eighth note
Eighth note
Sixteenth note
Thirty-second note
Seiko Epson Corporation
Note 3 Note n-1
Note 2 Note n-2
Note 2 Note n-2
Setting example
= 32,768 Hz)
CLK_SNDA
SNDADAT.MDRS bit
0: Note
Half note
Setting prohibited
Note n
Note n-1 Note n
Note n-1 Note n
(When SNDASEL.SINV bit = 0)
1: Rest
Half rest
Dotted quarter rest
Quarter rest
Dotted eighth rest
Eighth rest
Sixteenth rest
Thirty-second rest
S1C31W65 TECHNICAL MANUAL
(Rev. 1.1)