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8. Configure the following LCD8DDSP register bits:
- LCD8DDSP.DSPAR bit
- LCD8DDSP.COMREV bit
- LCD8DDSP.SEGREV bit
9. Write display data to the display data RAM.
10. Set the following bits when using the interrupt:
- Write 1 to the LCD8DINTF.FRMIF bit. (Clear interrupt flag)
- Set the LCD8DINTE.FRMIE bit to 1.
21.5.2 Display On/Off
The LCD display state is controlled using the LCD8DDSP.DSPC[1:0] bits.
Selecting "Display off" stops the drive voltage supply and the LCD driver pin outputs are all set to V
the LCD8DCTL.LCDDIS bit = 1.
Since "All on" and "All off" directly control the driving waveform output by the LCD driver, data in the display
data RAM is not altered. The common pins are set to dynamic drive for "All on" and to static drive for "All off."
This function can be used to make the display flash on and off without altering the display memory.
21.5.3 Inverted Display
The LCD panel display can be inverted (black/white inversion) using merely control bit manipulation, without rewrit-
ing the display data RAM. Setting the LCD8DDSP.DSPREV bit to 0 inverts the display; setting it to 1 returns the dis-
play to normal status. Note that the display will not be inverted when the LCD8DDSP.DSPC[1:0] bits = 0x3 (All off).
21.5.4 Drive Duty Switching
Drive duty can be set to 1/8 to 1/2 or static drive using the LCD8DTIM1.LDUTY[2:0] bits. Table 21.5.4.1 shows
the correspondence between the LCD8DTIM1.LDUTY[2:0] bit settings, drive duty, and maximum number of dis-
play segments.
LCD8DTIM1.
LDUTY[2:0] bits
0x7
0x6
0x5
0x4
0x3
0x2
0x1
0x0
Unused common pins output an OFF waveform that turns the segments off.
S1C31W65 TECHNICAL MANUAL
(Rev. 1.1)
(Select display area)
(Select COM pin assignment direction)
(Select SEG pin assignment direction)
(Enable LCD8D interrupt)
Table 21.5.2.1 LCD Display Control
LCD8DDSP.DSPC[1:0] bits
0x3
0x2
0x1
0x0
Table 21.5.4.1 Drive Duty Settings
Duty
Valid COM pins
1/8
COM0–COM7
1/7
COM0–COM6
1/6
COM0–COM5
1/5
COM0–COM4
1/4
COM0–COM3
1/3
COM0–COM2
1/2
COM0–COM1
Static
Seiko Epson Corporation
LCD display
All off (static drive)
All on
Normal display
Display off
Valid SEG pins
SEG4–SEG55
SEG0–SEG55
COM0
21 LCD DRIVER (LCD8D)
level when
SS
Max. number of
display dots/segments
416
364
312
260
224
168
112
56
21-7
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