Epson S1C31W65 Technical Manual page 6

Cmos 32-bit single chip microcontroller
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CONTENTS
DMAC Priority Set Register ...................................................................................................... 6-13
DMAC Priority Clear Register ................................................................................................... 6-13
DMAC Error Interrupt Flag Register ......................................................................................... 6-13
DMAC Transfer Completion Interrupt Flag Register ................................................................. 6-14
DMAC Transfer Completion Interrupt Enable Set Register ...................................................... 6-14
DMAC Transfer Completion Interrupt Enable Clear Register ................................................... 6-14
DMAC Error Interrupt Enable Set Register ............................................................................... 6-14
DMAC Error Interrupt Enable Clear Register ............................................................................ 6-15
7 I/O Ports (PPORT) .........................................................................................................7-1
7.1 Overview ......................................................................................................................... 7-1
7.2 I/O Cell Structure and Functions ..................................................................................... 7-2
7.2.1 Schmitt Input .................................................................................................... 7-2
7.2.2 Over Voltage Tolerant Fail-Safe Type I/O Cell ................................................... 7-2
7.2.3 Pull-Up/Pull-Down ............................................................................................ 7-2
7.2.4 CMOS Output and High Impedance State ....................................................... 7-3
7.3 Clock Settings ................................................................................................................. 7-3
7.3.1 PPORT Operating Clock ................................................................................... 7-3
7.3.2 Clock Supply in SLEEP Mode .......................................................................... 7-3
7.3.3 Clock Supply During Debugging ...................................................................... 7-3
7.4 Operations ...................................................................................................................... 7-3
7.4.1 Initialization ....................................................................................................... 7-3
7.4.2 Port Input/Output Control ................................................................................. 7-5
7.5 Interrupts ......................................................................................................................... 7-6
7.6 Control Registers ............................................................................................................ 7-6
Px Port Data Register ................................................................................................................ 7-6
Px Port Enable Register ............................................................................................................ 7-7
Px Port Pull-up/down Control Register ..................................................................................... 7-7
Px Port Interrupt Flag Register .................................................................................................. 7-8
Px Port Interrupt Control Register ............................................................................................. 7-8
Px Port Chattering Filter Enable Register .................................................................................. 7-8
Px Port Mode Select Register ................................................................................................... 7-8
Px Port Function Select Register .............................................................................................. 7-9
P Port Clock Control Register ................................................................................................... 7-9
P Port Interrupt Flag Group Register ........................................................................................ 7-10
7.7 Control Register and Port Function Configuration of this IC ......................................... 7-11
7.7.1 P0 Port Group .................................................................................................. 7-11
7.7.2 P1 Port Group .................................................................................................. 7-12
7.7.3 P2 Port Group .................................................................................................. 7-13
7.7.4 P3 Port Group .................................................................................................. 7-14
7.7.5 P4 Port Group .................................................................................................. 7-15
7.7.6 P5 Port Group .................................................................................................. 7-16
7.7.7 P6 Port Group .................................................................................................. 7-17
7.7.8 Pd Port Group .................................................................................................. 7-18
7.7.9 Common Registers between Port Groups....................................................... 7-19
8 Universal Port Multiplexer (UPMUX) ...........................................................................8-1
8.1 Overview ......................................................................................................................... 8-1
8.2 Peripheral Circuit I/O Function Assignment .................................................................... 8-1
8.3 Control Registers ............................................................................................................ 8-2
Pxy-xz Universal Port Multiplexer Setting Register ................................................................... 8-2
9 Watchdog Timer (WDT2) ..............................................................................................9-1
9.1 Overview ......................................................................................................................... 9-1
9.2 Clock Settings ................................................................................................................. 9-1
iv
Seiko Epson Corporation
S1C31W65 TECHNICAL MANUAL
(Rev. 1.1)

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