Adc12A Ch.n Interrupt Flag Register; Adc12A Ch.n Interrupt Enable Register - Epson S1C31W65 Technical Manual

19 12-BIT A/D CONVERTER (ADC12A)

ADC12A Ch.n Interrupt Flag Register

Register name Bit
ADC12A_nINTF 15–9 –
8
7
6
5
4
3
2
1
0
Bits 15–9 Reserved
Bit 8 OVIF
Bits 7–0 ADmCIF
These bits indicate the ADC12A interrupt cause occurrence status.
1 (R): Cause of interrupt occurred
0 (R): No cause of interrupt occurred
1 (W): Clear flag
0 (W): Ineffective
The following shows the correspondence between the bit and interrupt:
ADC12A_nINTF.OVIF bit:
ADC12A_nINTF.ADmCIF bit: Analog input signal m A/D conversion completion interrupt

ADC12A Ch.n Interrupt Enable Register

Register name Bit
ADC12A_nINTE 15–9 –
8
7
6
5
4
3
2
1
0
Bits 15–9 Reserved
Bit 8 OVIE
Bits 7–0 ADmCIE
These bits enable ADC12A interrupts.
1 (R/W): Enable interrupts
0 (R/W): Disable interrupts
The following shows the correspondence between the bit and interrupt:
ADC12A_nINTE.OVIE bit:
ADC12A_nINTE.ADmCIE bit: Analog input signal m A/D conversion completion interrupt
19-10
Bit name Initial
0x00
OVIF 0
AD7CIF 0
AD6CIF 0
AD5CIF 0
AD4CIF 0
AD3CIF 0
AD2CIF 0
AD1CIF 0
AD0CIF 0
A/D conversion result overwrite error interrupt
Bit name Initial
0x00
OVIE 0
AD7CIE 0
AD6CIE 0
AD5CIE 0
AD4CIE 0
AD3CIE 0
AD2CIE 0
AD1CIE 0
AD0CIE 0
A/D conversion result overwrite error interrupt
Seiko Epson Corporation
Reset R/W
– R –
H0 R/W Cleared by writing 1.
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
Reset R/W
– R –
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
H0 R/W
S1C31W65 TECHNICAL MANUAL
Remarks
Remarks
(Rev. 1.1)