Port Input/Output Control - Epson S1C31W65 Technical Manual

PPORTPxIOEN. PPORTPxIOEN.
PxIENy bit PxOENy bit
0 0
0 0
0 0
1 0
1 0
1 0
0 1
0 1
0 1
1 1
1 1
*1: Initial status. Current does not flow if the pin is placed into floating status.
*2: Use of the pull-up or pull-down function is recommended, as undesired current will flow if the port input is set to floating status.
Note: If the PPORTPxMODSEL.PxSELy bit for the port without a GPIO function is set to 0, the port
goes into initial status (refer to "Initial Settings"). The GPIO control bits are configured to a read-
only bit always read out as 0.

7.4.2 Port Input/Output Control

Peripheral I/O function control
The port for which a peripheral I/O function is selected is controlled by the peripheral circuit. For more infor-
mation, refer to the respective peripheral circuit chapter.
Setting output data to a GPIO port
Write data (1 = high output, 0 = low output) to be output from the Pxy pin to the PPORTPxDAT.PxOUTy bit.
Reading input data from a GPIO port
The data (1 = high input, 0 = low input) input from the Pxy pin can be read out from the PPORTPxDAT.PxINy bit.
Chattering filter function
Some ports have a chattering filter function and it can be controlled in each port. This function is enabled by
setting the PPORTPxCHATEN.PxCHATENy bit to 1. The input sampling time to remove chattering is deter-
mined by the CLK_PPORT frequency configured using the PPORTCLK register in common to all ports. The
chattering filter removes pulses with a shorter width than the input sampling time.
Input sampling time = — — — — — — — — — — — — — — — — [second]
Make sure the Pxy port interrupt is disabled before altering the PPORTCLK register and PPORTPxCHATEN.
PxCHATENy bit settings. A Pxy port interrupt may erroneously occur if these settings are altered in an inter-
rupt enabled status. Furthermore, enable the interrupt after a lapse of four or more CLK_PPORT cycles from
enabling the chattering filter function.
If the clock generator is configured so that it will supply CLK_PPORT to PPORT in SLEEP mode, the chatter-
ing filter of the port will function even in SLEEP mode. If CLK_PPORT is configured to stop in SLEEP mode,
PPORT inactivates the chattering filter during SLEEP mode to input pin status transitions directly to itself.
Key-entry reset function
This function issues a reset request when low-level pulses are input to all the specified ports simultaneously.
Make the following settings when using this function:
1. Configure the ports to be used for key-entry reset as general-purpose input ports (refer to "Initial settings
when using a port as a general-purpose input port (only for the ports with GPIO function)").
2. Configure the input pin combination for key-entry reset using the PPORTCLK.KRSTCFG[1:0] bits.
S1C31W65 TECHNICAL MANUAL
(Rev. 1.1)
Table 7.4.1.1 GPIO Port Control List
PPORTPxRCTL. PPORTPxRCTL.
PxRENy bit PxPDPUy bit
0
×
1 0
1 1
0
×
1 0
1 1
0
×
1 0
1 1
1 0
1 1
2 to 3
CLK_PPORT frequency [Hz]
Seiko Epson Corporation
7 I/O PORTS (PPORT)
Input Output
Disabled
Disabled
Disabled
Enabled Disabled
Enabled Disabled
Enabled Disabled
Disabled Enabled
Disabled Enabled
Disabled Enabled
Enabled Enabled
Enabled Enabled
(Eq. 7.2)
Pull-up/pull-down
condition
Off (Hi-Z) *1
Pulled down
Pulled up
Off (Hi-Z) *2
Pulled down
Pulled up
Off
Off
Off
Off
Off
7-5