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24 Basic External Connection Diagram
+
1.8–5.5 V
C
PW1
∗1
or 2.2–5.5 V
C
PW2
∗2
∗3
C
C
LCD1
LCD1
C
LCD2
C
C
LCD3
LCD3
C
C
LCD4
LCD4
∗4
(
)
C
G1
( )
C
D1
∗5
( )
C
G3
( )
X'tal3/
C
D3
Ceramic
*1: For Flash programming
*3: When 1/2 bias is selected
*3: When 1/3 bias is selected
*4: When OSC1 crystal oscillator is selected
*5: When OSC3 crystal/ceramic oscillator is selected
( ): Do not mount components if unnecessary.
S1C31W65 TECHNICAL MANUAL
(Rev. 1.1)
56SEG × 4COM/52SEG × 8COM
V
DD
V
D1
V
C1
V
C2
V
C3
C
P1
C
P2
S1C31W65
OSC1
[The potential of the substrate
OSC2
(back of the chip) is V
X'tal1
OSC3
OSC4
#RESET
V
SS
Seiko Epson Corporation
24 BASIC EXTERNAL CONNECTION DIAGRAM
LCD panel
EXSVD0x
BZOUT
SENB0
SENA0
SPICLKn
.]
SS
#SPISSn
USOUTn
TOUTn0/CAPn0
:
TOUTn3/CAPn3
ADIN00–06
#ADTRG0
VREFA0
SWCLK
V
DD
BZ
External
voltage
R
TMP2
R
TMP1
R
REF0
REF
RFIN0
C
REF
V
DD
REMO
IR transmitter module
Pxy
I/O
SDIn
SDOn
SPI
SCLn
I
2
C
SDAn
USINn
UART
PWM/Capture
A/D conversion inputs
( )
C
VREFA
V
DD
(
)
R
R
DBG1
DBG2
Debugging
SWD
tool
V
PP
C
VPP
24-1
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