Peripheral Scatter-Gather Transfer - Epson S1C31W65 Technical Manual

6 DMA CONTROLLER (DMAC)
DMA transfer procedure
1. Configure the data structure table for scatter-gather transfer.
Set the cycle_ctrl for the last task to 0x1 and those for other tasks to 0x5.
2. Start data transfer by following the procedure shown in Section 6.2.1, "Initialization." In Step 2 of the ini-
tialization procedure, configure the primary data structure with the control data shown below.
Transfer source end pointer = Data structure table end address
Transfer destination end pointer = Alternate data structure end address
dst_inc = 0x2
dst_size = 0x2
src_inc = 0x2
src_size = 0x2
R_power = 0x2
n_minus_1 = Number of tasks × 4 - 1
cycle_ctrl = 0x4
3. The DMA transfer is completed when a DMA transfer completion interrupt occurs.

6.5.5 Peripheral Scatter-Gather Transfer

In memory scatter-gather transfer mode, the second and subsequent DMA transfers are performed by auto-requests.
On the other hand, in peripheral scatter-gather transfer mode, all DMA transfers are performed by a DMA transfer
request issued by a peripheral circuit or a software DMA request.
Transfer using primary data structure
(cycle_ctrl = 0x6, 2
DMA transfer request
Data transfer using the alternate data structure starts
immediately after data transfer using the primary data structure
has completed without arbitration.
DMA transfer request
DMA transfer request
DMA transfer request
Figure 6.5.5.1 Peripheral Scatter-Gather Transfer Operation Example
6-8
R = 4, N = 16)
Task A setting
Copy the data structure for
Task A to the alternate data structure.
Task B setting
Copy the data structure for
Task B to the alternate data structure.
DMA transfer request
DMA transfer request
DMA transfer request
Task C setting
Copy the data structure for
Task C to the alternate data structure.
Task D setting
Copy the data structure for
Task D to the alternate data structure.
Seiko Epson Corporation
Transfer using alternate data structure
(cycle_ctrl = 0x7, 2 R = 4, N = 3)
Task A
(cycle_ctrl = 0x7, 2 R = 2, N = 8)
Task B
R
(cycle_ctrl = 0x7, 2 = 8, N = 5)
Task C
(cycle_ctrl = 0x1, 2 R = 4, N = 4)
Task D
S1C31W65 TECHNICAL MANUAL
DMA transfer
completion interrupt
(Rev. 1.1)