Panasonic FP7 Series Command Reference Manual page 187

2) Count input for CT (counter) instruction
3) Count input for UDC (up-down counter) instruction
4) Shift input for SR (shift register) instruction
5) Shift input for LRSR (left and right shift register) instruction
6) Differential execution type high-level instruction (instruction specified by p and instruction
name)
■
Regarding operation of TM, CT, and SR instructions between JP and LBL
instructions
● If the LBL instruction is located at an address after the JP instruction, each instruction is
processed as follows when the JP instruction is executed.
1) TM instruction: Clocking is not performed. If it is not executed once during a single scan,
the correct time cannot be guaranteed.
2) CT instruction: Not counted even if the count input is ON. The elapsed value is retained.
3) SR instruction: Even if shift input is ON, no shift is performed. The contents of the
specified register are retained.
● If the LBL instruction is located at an address before the JP instruction, each instruction is
processed as follows when the JP instruction is executed.
1) TM instruction: Multiple timings occur during a single scan, therefore the time cannot be
guaranteed.
2) CT instruction: If the state of the count input does not change during the scan, it will
operate in the usual way.
3) SR instruction: If the state of the shift input does not change during the scan, it will operate
in the usual way.
■
Operation of differential instruction between JP and LBL instructions
If the differential instruction is used between JP and LBL, the output obtained differs depending
on the execution condition of JP and the input timing of the differential instruction as shown
below.
WUME-FP7CPUPGR-12
3.26 JP/LBL (Jump/Label)
JP 1
Jumps repeatedly
when the execution
condition is on.
LBL 1
LBL 1
Executes
repeatedly when
the execution
condition is on.
JP 1
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