Panasonic FP7 Series Command Reference Manual page 175

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Operation Example
1) When X101 turns ON while X102 is OFF, the contents of WR3 (internal relays R30 to
R3F) are shifted by 1 bit to the left.
2) In the bit that has become blank due to left shifting (R30), 1 is set when X100 is ON and
0 is set when X100 is OFF.
3) When X102 turns ON, the contents of WR3 are reset to 0.
X100
X101
X102
R30
R31
R32
R33
R34
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Precautions for programming
● The data input, shift input, and reset input are required for the SR instruction.
● When reset input and shift input rise simultaneously, reset input is prioritized.
Shift input
Reset input
Rn
● Note that if a hold-type memory area is specified for the shift register, it will not be
automatically reset upon power ON.
● When combining a shift register instruction with an AND stack instruction or pop stack
instruction, make sure that the syntax is correct.
WUME-FP7CPUPGR-12
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3.23 SR (Shift Register)
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