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18.3.1.8 Baud Rate
With a 4.9152-MHz crystal and the PTC2 pin at logic 1 during reset, data is transferred between the
monitor and host at 4800 baud. If the PTC2 pin is at logic 0 during reset, the monitor baud rate is 9600.
See
Table
18-9.
Monitor baud rate
18.3.2 Security
A security feature discourages unauthorized reading of FLASH locations while in monitor mode. The host
can bypass the security feature at monitor mode entry by sending eight security bytes that match the
bytes at locations $FFF6–$FFFD. Locations $FFF6–$FFFD contain user-defined data.
Do not leave locations $FFF6–$FFFD blank. For security reasons, program
locations $FFF6–$FFFD even if they are not used for vectors.
During monitor mode entry, the MCU waits after the power-on reset for the host to send the eight security
bytes on pin PTA0. If the received bytes match those at locations $FFF6–$FFFD, the host bypasses the
security feature and can read all FLASH locations and execute code from FLASH. Security remains
bypassed until a power-on reset occurs. If the reset was not a power-on reset, security remains bypassed
and security code entry is not required. (See
Upon power-on reset, if the received bytes of the security code do not match the data at locations
$FFF6–$FFFD, the host fails to bypass the security feature. The MCU remains in monitor mode, but
reading a FLASH location returns an invalid value and trying to execute code from FLASH causes an
illegal address reset. After receiving the eight security bytes from the host, the MCU transmits a break
character, signifying that it is ready to receive a command.
The MCU does not transmit a break character until after the host sends the
eight security bytes.
To determine whether the security code entered is correct, check to see if bit 6 of RAM address $60 is
set. If it is, then the correct security code has been entered and FLASH can be accessed.
If the security sequence fails, the device can be reset (via power-pin reset only) and brought up in monitor
mode to attempt another entry. After failing the security sequence, the FLASH mode can also be bulk
erased by executing an erase routine that was downloaded into internal RAM. The bulk erase operation
clears the security code locations so that all eight security bytes become $FF.
Freescale Semiconductor
Table 18-9. Monitor Baud Rate Selection
1
2
4800
9600
Figure
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
VCO Frequency Multiplier (N)
3
4
14,400
19,200
NOTE
18-13.)
NOTE
Monitor ROM (MON)
5
6
24,000
28,800
263
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