Pwm Data Overflow And Underflow Conditions - Freescale Semiconductor MC68HC908MR16 Datasheet

UP-ONLY
COUNTER

12.4.2 PWM Data Overflow and Underflow Conditions

The PWM value registers are 16-bit registers. Although the counter is only 12 bits, the user may write a
16-bit signed value to a PWM value register. As shown in
is less than or equal to zero, the PWM will be inactive for the entire period. Conversely, if the PWM value
is greater than or equal to the timer modulus, the PWM will be active for the entire period. Refer to
Table 12-3.
The terms "active" and "inactive" refer to the asserted and negated states
of the PWM signals and should not be confused with the high-impedance
state of the PWM pins.
Table 12-3. PWM Data Overflow and Underflow Conditions
PWMVALxH:PWMVALxL
$0000–$0FFF
$1000–$7FFF
$8000–$FFFF
Freescale Semiconductor
LDOK = 1 LDOK = 1
MODULUS = 3 MODULUS = 4
PWM VALUE = 2 PWM VALUE = 2
PWMF SET PWMF SET
PWM
Figure 12-11. Edge-Aligned Modulus Loading
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
LDFQ1:LDFQ0 = 00 (RELOAD EVERY CYCLE)
LDOK = 1
MODULUS = 2
PWM VALUE = 2
PWMF SET
Figure 12-4
NOTE
Condition
Normal
Overflow
Underflow
PWM Generators
LDOK = 0
MODULUS = 1
PWM VALUE = 2
PWMF SET
and Figure 12-5, if the PWM value
PWM Value Used
Per register contents
$FFF
$000
125