Port D - Freescale Semiconductor MC68HC908MR16 Datasheet

Figure 10-10 shows the port C I/O logic.
READ DDRC ($0006)
WRITE DDRC ($0006)
WRITE PTC ($0002)
READ PTC ($0002)
When bit DDRCx is a logic 1, reading address $0002 reads the PTCx data latch. When bit DDRCx is a
logic 0, reading address $0002 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
DDRC Bit PTC Bit
0
1
1. X = don't care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect input.

10.5 Port D

Port D is a 7-bit, input-only port that shares its pins with the pulse width modulator for motor control
module (PMC).
The port D data register (PTD) contains a data latch for each of the seven port pins.
Address:
Read:
Write:
Reset:
PTD[6:0] — Port D Data Bits
These read/write bits are software programmable. Reset has no effect on port D data.
Freescale Semiconductor
RESET
Figure 10-10. Port C I/O Circuit
Table 10-3. Port C Pin Functions
I/O Pin Mode
(1) (2)
X Input, Hi-Z
X Output
$0003
Bit 7 6 5
0 PTD6 PTD5
R R R
R = Reserved
Figure 10-11. Port D Data Register (PTD)
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
DDRCx
PTCx
Table 10-3 summarizes the operation of the port C pins.
Accesses to DDRC
Read/Write
DDRC[6:0]
DDRC[6:0]
4 3
PTD4 PTD3 PTD2
R R
Unaffected by reset
PTCx
Accesses to PTC
Read Write
Pin
PTC[6:0]
PTC[6:0] PTC[6:0]
2 1 Bit 0
PTD1 PTD0
R R R
Port D
(3)
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