Port B; Port B Data Register - Freescale Semiconductor MC68HC908MR16 Datasheet

Input/Output (I/O) Ports (PORTS)
READ DDRA ($0004)
WRITE DDRA ($0004)
WRITE PTA ($0000)
READ PTA ($0000)
When bit DDRAx is a logic 1, reading address $0000 reads the PTAx data latch. When bit DDRAx is a
logic 0, reading address $0000 reads the voltage level on the pin. The data latch can always be written,
regardless of the state of its data direction bit.
DDRA Bit
0
1
1. X = don't care
2. Hi-Z = high impedance
3. Writing affects data register, but does not affect input.

10.3 Port B

Port B is an 8-bit, general-purpose, bidirectional I/O port that shares its pins with the analog-to-digital
convertor (ADC) module.

10.3.1 Port B Data Register

The port B data register (PTB) contains a data latch for each of the eight port B pins.
Address:
Read:
Write:
Reset:
PTB[7:0] — Port B Data Bits
These read/write bits are software-programmable. Data direction of each port B pin is under the control
of the corresponding bit in data direction register B. Reset has no effect on port B data.
104
RESET
Figure 10-4. Port A I/O Circuit
Table 10-1. Port A Pin Functions
PTA Bit I/O Pin Mode
(1) (2)
X Input, Hi-Z
X Output
$0001
Bit 7 6 5
PTB7 PTB6 PTB5
Figure 10-5. Port B Data Register (PTB)
MC68HC908MR32 • MC68HC908MR16 Data Sheet, Rev. 6.1
DDRAx
PTAx
Table 10-1 summarizes the operation of the port A pins.
Accesses to DDRA
Read/Write
DDRA[7:0]
DDRA[7:0]
4 3 2
PTB4 PTB3 PTB2
Unaffected by reset
PTAx
Accesses to PTA
Read Write
(3)
Pin
PTA[7:0]
PTA[7:0] PTA[7:0]
1 Bit 0
PTB1 PTB0
Freescale Semiconductor