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3.4.6
Recommended use of address space
The architecture of the V850ES/SA2 and V850ES/SA3 requires that a register that serves as a pointer be secured
for address generation when operand data in the data space is accessed. The address stored in this pointer ±32 KB
can be directly accessed by an instruction for operand data. Because the number of general-purpose registers that
can be used as a pointer is limited, however, by keeping the performance from dropping during address calculation
when a pointer value is changed, as many general-purpose registers as possible can be secured for variables, and the
program size can be reduced.
(1) Program space
Of the 32 bits of the PC (program counter), the higher 6 bits are fixed to 0, and only the lower 26 bits are valid.
Regarding the program space, therefore, a 64 MB space of contiguous addresses starting from 00000000H
unconditionally corresponds to the memory map.
To use the internal RAM area as the program space, access addresses 3FFC000H to 3FFEFFFH.
(2) Data space
With the V850ES/SA2 and V850ES/SA3, it seems that there are sixty-four 64 MB address spaces on the 4 GB
CPU address space. Therefore, the least significant bit (bit 25) of a 26-bit address is sign-extended to 32 bits
and allocated as an address.
Example: An application example of wrap-around is shown below.
If R = r0 (zero register) is specified for the LD/ST disp16 [R] instruction, a range of addresses 00000000H ±32
KB can be addressed by sign-extended disp16. All the resources, including the internal hardware, can be
addressed by one pointer.
The zero register (r0) is a register fixed to 0 by hardware, and practically eliminates the need for registers
dedicated to pointers.
CHAPTER 3 CPU FUNCTION
0 0 0 1 F F F F H
0 0 0 0 7 F F F H
Internal ROM area
(R = )
0 0 0 0 0 0 0 0 H
Internal peripheral
I/O area
F F F F F 0 0 0 H
F F F F E F F F H
Internal RAM area
F F F F B 0 0 0 H
F F F F A F F F H
Access prohibited
area
F F F F 8 0 0 0 H
Preliminary User's Manual U15905EJ1V0UD
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