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IICX
IICCL
Bit 0
Bit 3
Bit1
CLX
SMC
CL1
0
0
0
0
0
0
0
0
0
1
0
1
0
1
1
0
1
1
1
1
1
1
Remarks 1. ×: Don't care
2. When the transfer clock is set to timer output, the P96/TO4/A6 pin does not need to be set in
timer output mode.
(6) IIC shift register (IIC)
The IIC register is used for serial transmission/reception (shift operations) that are synchronized with the serial
clock. It can be read from or written to in 8-bit units, but data should not be written to IIC during a data
transfer.
After reset:
IIC
(7) Slave address register (SVA)
The SVA register holds the I
It can be read from or written to in 8-bit units, but bit 0 should be fixed to 0.
After reset:
SVA
358
CHAPTER 12 SERIAL INTERFACE FUNCTION
Table 12-6. Transfer Clock Setting
Transfer Clock
Bit0
CL0
0
0
f
/88
XX
0
1
f
/172
XX
1
0
f
/86
XX
1
1
TO4 output/66
×
0
f
/48
XX
1
0
f
/24
XX
1
1
TO4 output/18
×
×
Setting prohibited
×
0
f
/24
XX
1
0
f
/12
XX
1
1
Setting prohibited
00H
R/W
Address:
FFFFFD80H
2
C bus's slave addresses.
00H
R/W
Address:
FFFFFD83H
Preliminary User's Manual U15905EJ1V0UD
Settable Main Clock
Frequency (f
) Range
XX
4.0 MHz to 8.38 MHz
8.38 MHz to 16.76 MHz
4.19 MHz to 8.38 MHz
Note
TM4 Setting
8 MHz to 16.76 MHz
4 MHz to 8.38 MHz
Note
TM4 Setting
8.00 MHz to 8.38 MHz
4.00 MHz to 4.19 MHz
Operation Mode
Normal mode
(SMC = 0)
High-speed mode
(SMC = 1)
Normal mode
(SMC = 0)
0
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