Operation As Interval Timer - NEC V850ES/SA2 UPD703201 Manual

9.4.2

Operation as interval timer

The watchdog timer can be made to operate as an interval timer that repeatedly generates interrupts using the
count value set in advance as the interval, by setting bit 4 (WDTM4) of the watchdog timer mode register (WDTM) to
0.
When the watchdog timer operates as an interval timer, the interrupt mask flag (WDTMK) and priority specification
flags (WDTPR0 to WDTPR2) of the WDTIC register are valid and maskable interrupt request signals (INTWDTM) can
be generated. The default priority of the INTWDTM signal is set to the highest level among the maskable interrupt
request signals.
The interval timer continues to operate in the HALT mode, but it stops operating in the software STOP mode and
the IDLE mode. Therefore, set the RUN bit of the WDTM register to 1 before the software STOP mode or IDLE mode
is entered in order to clear the interval timer.
Cautions 1. Once the WDTM4 bit is set to 1 (thereby selecting the watchdog timer mode), the interval
timer mode is not entered as long as RESET is not input.
2. When the subclock is selected for the CPU clock, the count operation of the watchdog timer
stops (the value of the watchdog timer is maintained).
2
2
2
2
2
2
2
2
Remark
CHAPTER 9 WATCHDOG TIMER FUNCTIONS
Table 9-3. Interval Time of Interval Timer
Clock
f = 17 MHz
X
964 µ s
14
/f
X
15
/f 1.928 ms
X
16
/f 3.855 ms
X
17
/f 7.710 ms
X
18
/f 15.42 ms
X
19
/f 30.84 ms
X
20
/f 61.68 ms
X
22
/f 246.7 ms
X
f = f : Watchdog timer clock frequency
XW X
Preliminary User's Manual U15905EJ1V0UD
Interval Time
f = 13.5 MHz f = 8 MHz
X XX
1.214 ms 2.048 ms
2.427 ms 4.096 ms
4.855 ms 8.192 ms
9.709 ms 16.38 ms
19.42 ms 32.77 ms
33.84 ms 65.54 ms
77.67 ms 131.1 ms
310.7 ms 524.3 ms
279