NEC V850ES/SA2 UPD703201 Manual page 257

32-bit single-chip microcontrollers
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(b) Operation based on CRn register transitions
Figure 7-22. Timing of Operation Based on CRn Register Transitions
When the value of the CRn register changes from N to M before the rising edge of the FFH clock
→ The value of the CRn register is reloaded at the overflow that occurs immediately after.
Count clock
TMn count value
CRn
TCEn H
INTTMn
TOn
<1> CRn transition (N → M)
When the value of the CRn register changes from N to M after the rising edge of the FFH clock
→ The value of the CRn register is reloaded at the second overflow.
Count clock
TMn count value
CRn
TCEn
INTTMn
TOn
Caution In the case of reload from the CRn register between <1> and <2>, the value that is actually
used differs (Read value: M; Actual value of CRn register: N).
Remark
n = 2 to 5
CHAPTER 7 TIMER/COUNTER FUNCTION
N N + 1 N + 2
FFH
00H 01H
02H
N
<2>
N N + 1 N + 2
FFH
00H 01H
02H
03H
N
N
H
<1> CRn transition (N → M)
Preliminary User's Manual U15905EJ1V0UD
M
M + 1 M + 2
FFH
00H 01H
M
N
N + 1 N + 2
FFH
00H 01H
M
<2>
02H
M M + 1 M + 2
02H
M M + 1 M + 2
257

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