8-Bit Pwm Output Operation - NEC V850ES/SA2 UPD703201 Manual

7.3.4

8-bit PWM output operation

By setting the TMCn6 bit of 8-bit timer mode control register n (TMCn) to 1, 8-bit timer/event counter n performs
PWM output.
Pulses with the duty factor determined by the value set in 8-bit timer compare register n (CRn) are output from the
TOn pin.
Set the width of the active level of the PWM pulse in the CRn register. The active level can be selected using the
TMCn1 bit of the TMCn register.
The count clock can be selected using timer clock selection register n (TCLn).
PWM output can be enabled/disabled by the TOEn bit of the TMCn register.
Caution The CRn register rewrite interval must be three or more operation clocks (set by the TCLn
register).
(1) Basic operation of PWM output
Setting method
<1> Set each register.
• TCLn register: Selects the count clock (t).
• CRn register:
• TMCn register: Stops count operation, selects PWM mode, and leave timer output F/F unchanged.
<2> When the TCEn bit of the TMCn register is set to 1, counting starts.
PWM output operation
<1> When counting starts, PWM output (output from the TOn pin) outputs the inactive level until an
overflow occurs.
<2> When an overflow occurs, the active level set by setting method <1> is output. The active level is
output until the value of the CRn register and the count value of 8-bit timer counter n (TMn) match.
<3> When the value of the CRn register and the count value match, the inactive level is output and
continues to be output until an overflow occurs again.
<4> Then, steps <2> and <3> are repeated until counting is stopped.
<5> When counting is stopped by setting TCEn to 0, PWM output becomes inactive.
Remark
CHAPTER 7 TIMER/COUNTER FUNCTION
Compare value (N)
TMCn1
0 Active high
1 Active low
Timer output enabled
(TMCn register = 01000001B or 01000011B)

Cycle = 2 /t, active level width = N/t: N = 00 to FFH
n = 2 to 5
Preliminary User's Manual U15905EJ1V0UD
Active Level Selection
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