NEC V850ES/SA2 UPD703201 Manual page 340

SIn capture
Reg-R/W
INTCSIn interrupt
CSOTn bit
SIn capture
Reg-R/W
INTCSIn interrupt
CSOTn bit
SIn capture
Reg-R/W
INTCSIn interrupt
CSOTn bit
SIn capture
Reg-R/W
INTCSIn interrupt
CSOTn bit
Remark n = 0 to 3 (V850ES/SA2), n = 0 to 4 (V850ES/SA3)
340
CHAPTER 12 SERIAL INTERFACE FUNCTION
Figure 12-19. Clock Timing
(a) When CKPn = 0 and DAPn = 0
SCKn
D7
SIOn
(b) When CKPn = 1 and DAPn = 0
SCKn
SIOn D7
(c) When CKPn = 0 and DAPn = 1
SCKn
SIOn D7 D6
(d) When CKPn = 1 and DAPn = 1
SCKn
SIOn D7 D6
Preliminary User's Manual U15905EJ1V0UD
D6 D5 D4 D3 D2
D6 D5 D4 D3 D2
D5 D4 D3 D2
D5 D4 D3 D2
D1 D0
D1 D0
D1 D0
D1 D0