NEC V850ES/SA2 UPD703201 Manual page 90

32-bit single-chip microcontrollers
Table of Contents

Advertisement

Cautions 1. When a store instruction is executed to store data in the command register, an interrupt is
not acknowledged. This is because it is assumed that steps <3> and <4> above are
performed by successive store instructions. If another instruction is placed between <3>
and <4>, and if an interrupt is acknowledged by that instruction, the above sequence may
not be established, causing malfunction.
2. Although dummy data is written to the PRCMD register, use the same general-purpose
register used to set the special register (<4> in Example) to write data to the PRCMD
register (<3> in Example). The same applies when a general-purpose register is used for
addressing.
3. Five NOP instructions or more must be inserted immediately after setting the IDLE mode
or software STOP mode (by setting the STP bit of the PSC register to 1).
(2) Command register (PRCMD)
The command register (PRCMD) is an 8-bit register that protects the registers that may seriously affect the
application system from being written, so that the system does not inadvertently stop due to a program hang-
up. The first write access to a special register (power save control register (PSC)) is valid after data has been
written in advance to the PRCMD register. In this way, the value of the special register can be rewritten only in
a specific sequence, so as to protect the register from an illegal write access.
The PRCMD register is write-only, in 8-bit units (undefined data is read when this register is read).
After reset: Undefined
PRCMD
(3) System status register (SYS)
Status flags that indicate the operation status of the overall system are allocated to this register.
This register can be read or written in 8-bit or 1-bit units.
After reset:
SYS
PRERR
90
CHAPTER 3 CPU FUNCTION
W
Address:
7
6
5
REG7
REG6
REG5
00H
R/W
Address:
FFFFF802H
0
0
0
0
Protection error did not occur.
1
Protection error occurred.
Preliminary User's Manual U15905EJ1V0UD
FFFFF1FCH
4
3
2
REG4
REG3
REG2
0
0
0
Detects protection error
1
0
REG1
REG0
0
PRERR

Advertisement

Table of Contents
loading

Table of Contents