NEC V850ES/SA2 UPD703201 Manual page 175

Pin Name Alternate Function
Name
P43 INTP00
TI0
TCLR0
P44 INTP01
TO0
P45 INTP10
TI1
TCLR1
P46 INTP11
TO1
P70 ANI0
P71 ANI1
P72 ANI2
P73 ANI3
P74 ANI4
P75 ANI5
P76 ANI6
P77 ANI7
P78 ANI8
P79 ANI9
P710 ANI10
Note Set the valid edge by using the timer n valid edge selection register (SESn).
Table 4-18. Using Alternate Function of Port Pins (2/6)
Pnx Bit of Pn Register
I/O
Input
P43 = Setting not needed
Input
P43 = Setting not needed
Input
P43 = Setting not needed
Input
P44 = Setting not needed
Output
P44 = Setting not needed
Input
P45 = Setting not needed
Input
P45 = Setting not needed
Input
P45 = Setting not needed
Input
P46 = Setting not needed
Output
P46 = Setting not needed
Input
P70 = Setting impossible
Input
P71 = Setting impossible
Input
P72 = Setting impossible
Input
P73 = Setting impossible
Input
P74 = Setting impossible
Input
P75 = Setting impossible
Input
P76 = Setting impossible
Input
P77 = Setting impossible
Input
P78 = Setting impossible
Input
P79 = Setting impossible
Input
P710 = Setting impossible
PMnx Bit of PMn PMCnx Bit of
Register PMCn Register
PMC43 = 1
PM43 = Setting not needed
PMC43 = 1
PM43 = Setting not needed
PMC43 = 1
PM43 = Setting not needed
PMC44 = 1
PM44 = Setting not needed
PMC44 = 1
PM44 = Setting not needed
PMC45 = 1
PM45 = Setting not needed
PMC45 = 1
PM45 = Setting not needed
PMC45 = 1
PM45 = Setting not needed
PMC46 = 1
PM46 = Setting not needed
PMC46 = 1
PM46 = Setting not needed
−
−
−
−
−
−
−
−
−
−
−
PFCnx Bit of
PFCn Register
−
ETI0 = 0 (TM
−
ETI0 = 1 (TM
−
ECLR0 = 1 (
PFC44 = 0
PFC44 = 1
−
ETI1 = 0 (TM
−
ETI1 = 1 (TM
−
ECLR1 = 1 (
PFC46 = 0
PFC46 = 1
− −
− −
− −
− −
− −
− −
− −
− −
− −
− −
− −
O