Bus Timing - NEC V850ES/SA2 UPD703201 Manual

5.11 Bus Timing

Figure 5-4. Multiplexed Bus Read Timing (Bus Size: 16 Bits, 16-Bit Access)
T1
CLKOUT
A23 to A16
ASTB
CS3 to CS0
WAIT
A1
AD15 to AD0
RD
8-bit access
AD15 to AD8
AD7 to AD0
T1
CLKOUT
A23 to A16,
AD15 to AD8
ASTB
CS3 to CS0
WAIT
A1
AD7 to AD0
RD
CHAPTER 5 BUS CONTROL FUNCTION
T2 T3 T1
A1
A2
D1
Odd address Even address
Active
−
Active
Figure 5-5. Multiplexed Bus Read Timing (Bus Size: 8 Bits)
T2 T3 T1
A1
A2
D1
Preliminary User's Manual U15905EJ1V0UD
T2 TW TW
A2
D2
Programmable External
wait wait
−
T2 TW TW
A2
D2
Programmable External
wait wait
T3 TI T1
A3
A3
Idle state
T3 TI T1
A3
A3
Idle state
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