NEC V850ES/SA2 UPD703201 Manual page 351

32-bit single-chip microcontrollers
Table of Contents

Advertisement

ACKE
0
Acknowledgement disable.
1
Acknowledgement enabled. During the ninth clock period, the SDA line is set to low level.
However, ACK is invalid during address transfers and is valid when EXC = 1.
Condition for clearing (ACKE = 0)Note
• Cleared by instruction
• When RESET is input
STT
0
Start condition not generated.
1
When bus is released (in STOP mode):
Generates a start condition (for starting as master). The SDA line is changed from high level
to low level and then the start condition is generated. Next, after the rated amount of time has
elapsed, SCL is changed to low level.
When bus is not used:
This trigger functions as a start condition reserve flag. When set, it releases the bus and then
automatically generates a start condition.
In the wait state (when master device):
Generates a restart condition after releasing the wait.
Cautions concerning set timing
• For master reception: Cannot be set during transfer. Can be set only when ACKE has been set to 0
and slave has been notified of final reception.
• For master transmission: A start condition cannot be generated normally during the ACK period. Set
during the wait period.
• Cannot be set at the same time as SPT
Condition for clearing (STT = 0)
• Cleared by instruction
• Cleared by loss in arbitration
• Cleared after start condition is generated by
master device
• When LREL = 1
• When IICE = 0
• Cleared when RESET is input
Note This flag's signal is invalid when IICE = 0.
Remark
Bit 1 (STT) is 0 if it is read immediately after data setting.
CHAPTER 12 SERIAL INTERFACE FUNCTION
Acknowledge control
Condition for setting (ACKE = 1)
• Set by instruction
Start condition trigger
Condition for setting (STT = 1)
• Set by instruction
Preliminary User's Manual U15905EJ1V0UD
(3/4)
351

Advertisement

Table of Contents
loading

Table of Contents