NEC V850ES/SA2 UPD703201 Manual page 68

(6) Exception/debug trap status saving registers (DBPC and DBPSW)
DBPC and DBPSW are exception/debug trap status registers.
If an exception trap or debug trap occurs, the contents of the program counter (PC) are saved to DBPC, and
those of the program status word (PSW) are saved to DBPSW.
The contents to be saved to DBPC are the address of the instruction next to the one that is executed when an
exception trap or debug trap occurs.
The current contents of the PSW are saved to DBPSW.
Bits 31 to 26 of DBPC and bits 31 to 8 of DBPSW are reserved for future function expansion (fixed to 0).
31
DBPC
0 0 0 0 0 0
31
DBPSW
0 0 0 0 0 0
(7) CALLT base pointer (CTBP)
The CALLT base pointer (CTBP) is used to specify a table address or generate a target address (bit 0 is fixed
to 0).
Bits 31 to 26 of this register are reserved for future function expansion (fixed to 0).
31
CTBP
0 0 0 0 0 0
68
CHAPTER 3 CPU FUNCTION
26 25
0 0 0 0 0 0 0 0 0 0 0 0
26 25
Preliminary User's Manual U15905EJ1V0UD
(Contents of PC)
12 11 10 9 8
0 0 0 0 0 0 (Contents of PSW)
(Base address)
0
Default value
0xxxxxxxH
(x: Undefined)
0
Default value
00000xxxH
(x: Undefined)
0
Default value
0
0xxxxxxxH
(x: Undefined)