RM0367
7.2
Clocks
Four different clock sources can be used to drive the system clock (SYSCLK):
•
HSI16 (high-speed internal) oscillator clock
•
HSE (high-speed external) oscillator clock
•
PLL clock
•
MSI (multispeed internal) oscillator clock
The MSI at 2.1MHz is used as system clock source after startup from power reset,
system or RTC domain reset, and after wake-up from Standby mode.
The HSI16, HSI16 divided by 4, or the MSI at any of its possible frequency can be used
to wake up from Stop mode.
The devices have two secondary clock sources:
•
37 kHz low speed internal RC (LSI RC) which drives the independent watchdog and
optionally the RTC used for Auto-wakeup from Stop/Standby mode, the LCD and the
LPTIMER.
•
32.768 kHz low speed external crystal (LSE crystal) which optionally drives the real-
time clock (RTCCLK), the LPTIMER, the LCD and USARTs.
Each clock source can be switched on or off independently when it is not used to optimize
power consumption.
Several prescalers can be used to configure the AHB frequency and the two APBs (APB1
and APB2) domains. The maximum frequency of AHB, APB1 and the APB2 domains is
32 MHz. It depends on the device voltage range. For more details refer to
Dynamic voltage scaling
All the peripheral clocks are derived from the system clock (SYSCLK) except:
•
The 48 MHz USB and RNG clocks which are derived from one of the two following
source:
–
–
•
The ADC can be derived either from the APB clock or the HSI16 clock.
•
The LPUART1 and USART1/2 clock which is derived (selected by software) from one
of the four following sources:
–
–
–
–
•
The I2C1 clock which is derived (selected by software) from one of the three following
sources:
–
–
–
•
The LPTIMER clock which is derived (selected by software) from one of the four
following sources:
–
–
management.
PLL VCO clock.
RC48 Clock (HSI48)
system clock
HSI16 clock
LSE clock
APB clock (PCLK)
system clock
HSI16 clock
APB clock (PCLK)
HSI16 clock
LSE clock
RM0367 Rev 7
Reset and clock control (RCC)
Section 6.1.5:
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