Figure 308. Example Of 16-Bit Data Frame Extended To 32-Bit Channel Frame; Figure 309. Pcm Standard Waveforms (16-Bit); Figure 310. Pcm Standard Waveforms (16-Bit Extended To 32-Bit Packet Frame) - ST STM32L0x3 Reference Manual

Serial peripheral interface/ inter-IC sound (SPI/I2S)

Figure 308. Example of 16-bit data frame extended to 32-bit channel frame

In transmission mode, when a TXE event occurs, the application has to write the data to be
transmitted (in this case 0x76A3). The 0x000 field is transmitted first (extension on 32-bit).
The TXE flag is set again as soon as the effective data (0x76A3) is sent on SD.
In reception mode, RXNE is asserted as soon as the significant half-word is received (and
not the 0x0000 field).
In this way, more time is provided between two write or read operations to prevent underrun
or overrun conditions.
PCM standard
For the PCM standard, there is no need to use channel-side information. The two PCM
modes (short and long frame) are available and configurable using the PCMSYNC bit in
SPIx_I2SCFGR register.
short frame
For long frame synchronization, the WS signal assertion time is fixed to 13 bits in master
mode.
For short frame synchronization, the WS synchronization signal is only one cycle long.

Figure 310. PCM standard waveforms (16-bit extended to 32-bit packet frame)

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Only one access to the SPIx-DR register

Figure 309. PCM standard waveforms (16-bit)

CK
WS
WS
long frame
SD
MSB
CK
WS
short frame
Up to 13-bits
WS
long frame
SD
MSB
0x76A3
13-bits
LSB MSB
16 bits
LSB
RM0367 Rev 7
RM0367
MS19598V1
MS30106V1
MS30107V1