ST STM32L0x3 Reference Manual page 986

Code examples
/* (5) Configure the Trigger Selection bits of the Interrupt line
/* (6) Configure the Trigger Selection bits of the Interrupt line
RCC->IOPENR
GPIOA->MODER
//SYSCFG->EXTICR[0] &= (uint16_t)~SYSCFG_EXTICR1_EXTI0_PA; /* (3) */
EXTI->IMR
EXTI->RTSR
//EXTI->FTSR |= 0x0001; /* (6) */
/* Configure NVIC for Extended Interrupt */
/* (7) Enable Interrupt on EXTI0_1 */
/* (8) Set priority for EXTI0_1 */
NVIC_EnableIRQ(EXTI0_1_IRQn);
NVIC_SetPriority(EXTI0_1_IRQn,0);
A.8 ADC
A.8.1 Calibration code example
/* (1) Ensure that ADEN = 0 */
/* (2) Clear ADEN */
/* (3) Set ADCAL=1 */
/* (4) Wait until EOCAL=1 */
/* (5) Clear EOCAL */
if ((ADC1->CR
{
ADC1->CR
}
ADC1->CR
while ((ADC1->ISR
{
/* For robust implementation, add here time-out management */
}
ADC1->ISR
A.8.2 ADC enable sequence code example
/* (1) Clear the ADRDY bit */
/* (2) Enable the ADC */
/* (3) Wait until ADC ready */
ADC1->ISR
ADC1->CR
if ((ADC1->CFGR1
986/1043
on rising edge */
on falling edge */
|= RCC_IOPENR_GPIOAEN;
= (GPIOA->MODER
|= 0x0001; /* (4) */
|= 0x0001; /* (5) */
& ADC_CR_ADEN) != 0)
|= ADC_CR_ADDIS;
|= ADC_CR_ADCAL;
& ADC_ISR_EOCAL) == 0)
|= ADC_ISR_EOCAL;
|= ADC_ISR_ADRDY;
|= ADC_CR_ADEN;
& ADC_CFGR1_AUTOFF) == 0)
/* (1) */
& ~(GPIO_MODER_MODE0));
/* (7) */
/* (8) */
/* (1) */
/* (2) */
/* (3) */
/* (4) */
/* (5) */
/* (1) */
/* (2) */
RM0367 Rev 7
RM0367
/* (2) */