Figure 296. Transmitting 0X8Eaa33; Figure 297. Receiving 0X8Eaa33; Figure 298. I - ST STM32L0x3 Reference Manual

Serial peripheral interface/ inter-IC sound (SPI/I2S)
•
In transmission mode:
If 0x8EAA33 has to be sent (24-bit):
• In reception mode:
If data 0x8EAA33 is received:

Figure 298. I

When 16-bit data frame extended to 32-bit channel frame is selected during the I
configuration phase, only one access to the SPIx_DR register is required. The 16 remaining
bits are forced by hardware to 0x0000 to extend the data to 32-bit format.
If the data to transmit or the received data are 0x76A3 (0x76A30000 extended to 32-bit), the
operation shown in
900/1043

Figure 296. Transmitting 0x8EAA33

First write to Data register
0x8EAA

Figure 297. Receiving 0x8EAA33

First read to Data register
0x8EAA
2
S Philips standard (16-bit extended to 32-bit packet frame with
CK
WS
Transmission
16-bit data
SD
MSB
Channel left 32-bit
Figure 299 is required.
RM0367 Rev 7
Second write to Data register
0x33XX
Only the 8 MSB are sent
to compare the 24 bits
8 LSBs have no meaning
and can be anything
Second read to Data register
0x33XX
Only the 8 MSB are sent
to compare the 24 bits
8 LSBs have no meaning
and can be anything
CPOL = 0)
Reception
16-bit remaining 0 forced
LSB
RM0367
MS19593V1
MS19594V1
Channel right
MS19599V1
2
S